mb/51nb/x210: add libgfxinit support

Derived from x210_test branch of HarryKipper's repo:
https://github.com/harrykipper/coreboot

Test: build/boot x210, test eDP, MiniDP, VGA outputs

Change-Id: Ie2b79b236a458ebd243c992d6e615e41930eeb50
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39106
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Matt DeVillier 2020-02-26 12:55:49 -06:00 committed by Patrick Georgi
parent 2f62a352ea
commit 6d6fb6bdd2
4 changed files with 27 additions and 0 deletions

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@ -6,6 +6,7 @@ config BOARD_SPECIFIC_OPTIONS
select EC_51NB_NPCE985LA0DX
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select MAINBOARD_HAS_LIBGFXINIT
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select SOC_INTEL_KABYLAKE
select SPD_READ_BY_WORD

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@ -2,3 +2,4 @@
# This file is part of the coreboot project.
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB) += hda_verb.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads

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@ -1,5 +1,12 @@
chip soc/intel/skylake
# Enable Panel as eDP and configure power delays
register "gpu_pp_up_delay_ms" = "210" # T3
register "gpu_pp_down_delay_ms" = "500" # T10
register "gpu_pp_cycle_delay_ms" = "5000" # T12
register "gpu_pp_backlight_on_delay_ms" = "1" # T7
register "gpu_pp_backlight_off_delay_ms" = "200" # T9
# Enable deep Sx states
register "deep_s3_enable_ac" = "1"
register "deep_s3_enable_dc" = "1"

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@ -0,0 +1,18 @@
-- SPDX-License-Identifier: GPL-2.0-or-later
-- This file is part of the coreboot project.
with HW.GFX.GMA;
with HW.GFX.GMA.Display_Probing;
use HW.GFX.GMA;
use HW.GFX.GMA.Display_Probing;
private package GMA.Mainboard is
ports : constant Port_List :=
(DP1,
DP2,
eDP,
Others => Disabled);
end GMA.Mainboard;