mb/51nb/x210: add libgfxinit support
Derived from x210_test branch of HarryKipper's repo: https://github.com/harrykipper/coreboot Test: build/boot x210, test eDP, MiniDP, VGA outputs Change-Id: Ie2b79b236a458ebd243c992d6e615e41930eeb50 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39106 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -6,6 +6,7 @@ config BOARD_SPECIFIC_OPTIONS
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select EC_51NB_NPCE985LA0DX
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select MAINBOARD_HAS_LIBGFXINIT
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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select SOC_INTEL_KABYLAKE
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select SPD_READ_BY_WORD
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@ -2,3 +2,4 @@
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# This file is part of the coreboot project.
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ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB) += hda_verb.c
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ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
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@ -1,5 +1,12 @@
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chip soc/intel/skylake
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# Enable Panel as eDP and configure power delays
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register "gpu_pp_up_delay_ms" = "210" # T3
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register "gpu_pp_down_delay_ms" = "500" # T10
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register "gpu_pp_cycle_delay_ms" = "5000" # T12
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register "gpu_pp_backlight_on_delay_ms" = "1" # T7
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register "gpu_pp_backlight_off_delay_ms" = "200" # T9
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# Enable deep Sx states
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register "deep_s3_enable_ac" = "1"
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register "deep_s3_enable_dc" = "1"
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@ -0,0 +1,18 @@
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-- SPDX-License-Identifier: GPL-2.0-or-later
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-- This file is part of the coreboot project.
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with HW.GFX.GMA;
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with HW.GFX.GMA.Display_Probing;
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use HW.GFX.GMA;
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use HW.GFX.GMA.Display_Probing;
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private package GMA.Mainboard is
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ports : constant Port_List :=
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(DP1,
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DP2,
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eDP,
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Others => Disabled);
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end GMA.Mainboard;
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