nb/intel/x4x/raminit: Rework receive enable calibration
Moves receive enable calibration to a separate file to lighten raminit.c a bit. Receive enable calibration is quite similar to gm45 so it reuses some of its function names. The functional changes are: * the minimum coarse is now reset for each channel; * on the second fine search for DQS high, TAP overflow is handled by increasing medium; * start coarse at CAS + 1 instead of CAS - 1. Other Intel northbridges do the same and the results are more in line with register dumps from vendor bios. These might improve stability. TESTED on ga-g41m-es2l Change-Id: I0c970455e609d3ce96a262cbf110336a2079da4d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/18692 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Arthur Heymans
parent
e464ccd116
commit
6d7a8c1125
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@ -20,6 +20,7 @@ romstage-y += early_init.c
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romstage-y += raminit.c
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romstage-y += raminit_ddr2.c
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romstage-y += ram_calc.c
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romstage-y += rcven.c
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ramstage-y += acpi.c
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ramstage-y += ram_calc.c
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@ -31,11 +31,6 @@
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#define ME_UMA_SIZEMB 0
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static inline void barrier(void)
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{
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asm volatile("mfence":::);
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}
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static u32 fsb2mhz(u32 speed)
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{
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return (speed * 267) + 800;
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@ -1161,282 +1156,6 @@ static void jedec_ddr2(struct sysinfo *s)
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printk(BIOS_DEBUG, "MRS done\n");
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}
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static u8 sampledqs(u16 mchloc, u32 addr, u8 hilow, u8 repeat)
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{
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u8 dqsmatch = 1;
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volatile u32 strobe;
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while (repeat-- > 0) {
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MCHBAR8(0x5d8) = MCHBAR8(0x5d8) & ~0x2;
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udelay(2);
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MCHBAR8(0x5d8) = MCHBAR8(0x5d8) | 0x2;
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udelay(2);
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MCHBAR8(0x9d8) = MCHBAR8(0x9d8) & ~0x2;
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udelay(2);
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MCHBAR8(0x9d8) = MCHBAR8(0x9d8) | 0x2;
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udelay(2);
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barrier();
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strobe = read32((u32 *)addr);
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barrier();
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if (((MCHBAR32(mchloc) & 0x40) >> 6) != hilow)
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dqsmatch = 0;
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}
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return dqsmatch;
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}
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static void rcven_ddr2(struct sysinfo *s)
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{
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u8 i, reg8, ch, lane;
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u32 addr;
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u8 tap = 0;
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u8 savecc, savemedium, savetap, coarsecommon, medium;
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u8 lanecoarse[8] = {0};
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u8 mincoarse = 0xff;
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u8 pitap[2][8];
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u16 coarsectrl[2];
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u16 coarsedelay[2];
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u16 mediumphase[2];
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u16 readdelay[2];
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u16 mchbar;
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MCHBAR8(0x5d8) = MCHBAR8(0x5d8) & ~0xc;
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MCHBAR8(0x9d8) = MCHBAR8(0x9d8) & ~0xc;
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MCHBAR8(0x5dc) = MCHBAR8(0x5dc) & ~0x80;
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FOR_EACH_POPULATED_CHANNEL(s->dimms, ch) {
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addr = (ch << 29);
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for (i = 0; !RANK_IS_POPULATED(s->dimms, ch, i); i++)
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addr += 128*1024*1024;
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for (lane = 0; lane < 8; lane++) {
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printk(BIOS_DEBUG, "Channel %d, Lane %d addr=0x%08x\n", ch, lane, addr);
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coarsecommon = (s->selected_timings.CAS - 1);
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switch (lane) {
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case 0: case 1:
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medium = 0;
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break;
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case 2: case 3:
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medium = 1;
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break;
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case 4: case 5:
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medium = 2;
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break;
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case 6: case 7:
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medium = 3;
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break;
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default:
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medium = 0;
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break;
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}
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mchbar = 0x400*ch + 0x561 + (lane << 2);
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tap = 0;
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MCHBAR32(0x400*ch + 0x248) = (MCHBAR32(0x400*ch + 0x248) & ~0xf0000) |
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(coarsecommon << 16);
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MCHBAR16(0x400*ch + 0x58c) = (MCHBAR16(0x400*ch + 0x58c) & ~(3 << (lane*2))) |
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(medium << (lane*2));
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MCHBAR8(0x400*ch + 0x560 + lane*4) = MCHBAR8(0x400*ch + 0x560 + lane*4) & ~0xf;
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MCHBAR8(0x400*ch + 0x560 + lane*4) = MCHBAR8(0x400*ch + 0x560 + lane*4) & ~0x70;
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savecc = coarsecommon;
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savemedium = medium;
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savetap = 0;
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MCHBAR16(0x400*ch + 0x588) = (MCHBAR16(0x400*ch + 0x588) & ~(3 << (lane*2))) |
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(1 << (lane*2));
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printk(BIOS_DEBUG, "rcven 0.1 coarse=%d\n", coarsecommon);
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while (sampledqs(mchbar, addr, 1, 1) == 1) {
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if (medium < 3) {
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medium++;
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MCHBAR16(0x400*ch + 0x58c) = (MCHBAR16(0x400*ch + 0x58c) &
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~(3 << (lane*2))) | (medium << (lane*2));
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} else {
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medium = 0;
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coarsecommon++;
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MCHBAR32(0x400*ch + 0x248) = (MCHBAR32(0x400*ch + 0x248) &
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~0xf0000) | (coarsecommon << 16);
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MCHBAR16(0x400*ch + 0x58c) = (MCHBAR16(0x400*ch + 0x58c) &
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~(3 << (lane*2))) | (medium << (lane*2));
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}
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if (coarsecommon > 16) {
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die("Coarse > 16: DQS tuning failed, halt\n");
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break;
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}
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}
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printk(BIOS_DEBUG, " GOT IT (high -> low transition) coarse=%d medium=%d\n", coarsecommon, medium);
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savemedium = medium;
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savecc = coarsecommon;
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if (medium < 3) {
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medium++;
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MCHBAR16(0x400*ch + 0x58c) = (MCHBAR16(0x400*ch + 0x58c) &
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~(3 << (lane*2))) | (medium << (lane*2));
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} else {
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medium = 0;
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coarsecommon++;
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MCHBAR32(0x400*ch + 0x248) = (MCHBAR32(0x400*ch + 0x248) & ~0xf0000) |
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(coarsecommon << 16);
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MCHBAR16(0x400*ch + 0x58c) = (MCHBAR16(0x400*ch + 0x58c) & ~(3 << (lane*2))) |
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(medium << (lane*2));
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}
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printk(BIOS_DEBUG, "rcven 0.2\n");
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while (sampledqs(mchbar, addr, 0, 1) == 1) {
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savemedium = medium;
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savecc = coarsecommon;
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if (medium < 3) {
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medium++;
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MCHBAR16(0x400*ch + 0x58c) = (MCHBAR16(0x400*ch + 0x58c) &
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~(3 << (lane*2))) | (medium << (lane*2));
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} else {
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medium = 0;
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coarsecommon++;
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MCHBAR32(0x400*ch + 0x248) = (MCHBAR32(0x400*ch + 0x248) &
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~0xf0000) | (coarsecommon << 16);
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MCHBAR16(0x400*ch + 0x58c) = (MCHBAR16(0x400*ch + 0x58c) &
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~(3 << (lane*2))) | (medium << (lane*2));
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}
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if (coarsecommon > 16) {
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die("Coarse DQS tuning 2 failed, halt\n");
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break;
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}
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}
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printk(BIOS_DEBUG, " GOT IT (low -> high transition) coarse=%d medium=%d\n", coarsecommon, medium);
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coarsecommon = savecc;
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medium = savemedium;
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MCHBAR32(0x400*ch + 0x248) = (MCHBAR32(0x400*ch + 0x248) &
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~0xf0000) | (coarsecommon << 16);
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MCHBAR16(0x400*ch + 0x58c) = (MCHBAR16(0x400*ch + 0x58c) &
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~(3 << (lane*2))) | (medium << (lane*2));
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printk(BIOS_DEBUG, "rcven 0.3\n");
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tap = 0;
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while (sampledqs(mchbar, addr, 1, 1) == 0) {
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savetap = tap;
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tap++;
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if (tap > 14)
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break;
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MCHBAR8(0x400*ch + 0x560 + (lane*4)) =
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(MCHBAR8(0x400*ch + 0x560 + (lane*4)) & ~0xf) | tap;
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}
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tap = savetap;
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MCHBAR8(0x400*ch + 0x560 + (lane*4)) =
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(MCHBAR8(0x400*ch + 0x560 + (lane*4)) & ~0xf) | tap;
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MCHBAR8(0x400*ch + 0x560 + (lane*4)) =
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(MCHBAR8(0x400*ch + 0x560 + (lane*4)) & ~0x70) | 0x30;
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if (medium < 3) {
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medium++;
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MCHBAR16(0x400*ch + 0x58c) = (MCHBAR16(0x400*ch + 0x58c) &
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~(3 << (lane*2))) | (medium << (lane*2));
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} else {
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medium = 0;
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coarsecommon++;
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MCHBAR32(0x400*ch + 0x248) = (MCHBAR32(0x400*ch + 0x248) &
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~0xf0000) | (coarsecommon << 16);
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MCHBAR16(0x400*ch + 0x58c) = (MCHBAR16(0x400*ch + 0x58c) &
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~(3 << (lane*2))) | (medium << (lane*2));
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}
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if (sampledqs(mchbar, addr, 1, 1) == 0)
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die("Not at DQS high, doh\n");
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printk(BIOS_DEBUG, "rcven 0.4\n");
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while (sampledqs(mchbar, addr, 1, 1) == 1) {
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coarsecommon--;
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MCHBAR32(0x400*ch + 0x248) = (MCHBAR32(0x400*ch + 0x248) &
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~0xf0000) | (coarsecommon << 16);
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if (coarsecommon == 0) {
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die("Couldn't find DQS-high 0 indicator, halt\n");
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break;
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}
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}
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printk(BIOS_DEBUG, " GOT IT (high -> low transition) coarse=%d medium=%d\n", coarsecommon, medium);
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printk(BIOS_DEBUG, "rcven 0.5\n");
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while (sampledqs(mchbar, addr, 0, 1) == 1) {
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savemedium = medium;
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savecc = coarsecommon;
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if (medium < 3) {
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medium++;
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MCHBAR16(0x400*ch + 0x58c) = (MCHBAR16(0x400*ch + 0x58c) &
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~(3 << (lane*2))) | (medium << (lane*2));
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} else {
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medium = 0;
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coarsecommon++;
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MCHBAR32(0x400*ch + 0x248) = (MCHBAR32(0x400*ch + 0x248) &
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~0xf0000) | (coarsecommon << 16);
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MCHBAR16(0x400*ch + 0x58c) = (MCHBAR16(0x400*ch + 0x58c) &
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~(3 << (lane*2))) | (medium << (lane*2));
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}
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if (coarsecommon > 16) {
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die("Coarse DQS tuning 5 failed, halt\n");
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break;
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}
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}
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printk(BIOS_DEBUG, " GOT IT (low -> high transition) coarse=%d medium=%d\n", coarsecommon, medium);
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printk(BIOS_DEBUG, "rcven 0.6\n");
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coarsecommon = savecc;
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medium = savemedium;
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MCHBAR32(0x400*ch + 0x248) = (MCHBAR32(0x400*ch + 0x248) &
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~0xf0000) | (coarsecommon << 16);
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MCHBAR16(0x400*ch + 0x58c) = (MCHBAR16(0x400*ch + 0x58c) &
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~(3 << (lane*2))) | (medium << (lane*2));
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while (sampledqs(mchbar, addr, 1, 1) == 0) {
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savetap = tap;
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tap++;
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if (tap > 14)
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break;
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MCHBAR8(0x400*ch + 0x560 + lane*4) =
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(MCHBAR8(0x400*ch + 0x560 + lane*4) & ~0xf) | tap;
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}
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tap = savetap;
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MCHBAR8(0x400*ch + 0x560 + lane*4) =
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(MCHBAR8(0x400*ch + 0x560 + lane*4) & ~0xf) | tap;
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MCHBAR8(0x400*ch + 0x560 + lane*4) =
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(MCHBAR8(0x400*ch + 0x560 + lane*4) & ~0x70) | 0x70;
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pitap[ch][lane] = 0x70 | tap;
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MCHBAR16(0x400*ch + 0x588) = MCHBAR16(0x400*ch + 0x588) & ~(3 << (lane*2));
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lanecoarse[lane] = coarsecommon;
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printk(BIOS_DEBUG, "rcven 0.7\n");
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} // END EACH LANE
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// Find minimum coarse value
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for (lane = 0; lane < 8; lane++) {
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if (mincoarse > lanecoarse[lane])
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mincoarse = lanecoarse[lane];
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}
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printk(BIOS_DEBUG, "Found min coarse value = %d\n", mincoarse);
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for (lane = 0; lane < 8; lane++) {
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reg8 = (lanecoarse[lane] == 0) ? 0 : lanecoarse[lane] - mincoarse;
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MCHBAR16(0x400*ch + 0x5fa) = (MCHBAR16(0x400*ch + 0x5fa) & ~(3 << (lane*2))) |
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(reg8 << (lane*2));
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}
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MCHBAR32(0x400*ch + 0x248) = (MCHBAR32(0x400*ch + 0x248) & ~0xf0000) | (mincoarse << 16);
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coarsectrl[ch] = mincoarse;
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coarsedelay[ch] = MCHBAR16(0x400*ch + 0x5fa);
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mediumphase[ch] = MCHBAR16(0x400*ch + 0x58c);
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readdelay[ch] = MCHBAR16(0x400*ch + 0x588);
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} // END EACH POPULATED CHANNEL
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FOR_EACH_CHANNEL(ch) {
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for (lane = 0; lane < 8; lane++) {
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MCHBAR8(0x400*ch + 0x560 + (lane*4)) =
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(MCHBAR8(0x400*ch + 0x560 + (lane*4)) & ~0xf) | pitap[ch][lane];
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}
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MCHBAR32(0x400*ch + 0x248) = (MCHBAR32(0x400*ch + 0x248) & ~0xf0000) |
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(coarsectrl[ch] << 16);
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MCHBAR16(0x400*ch + 0x5fa) = coarsedelay[ch];
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MCHBAR16(0x400*ch + 0x58c) = mediumphase[ch];
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}
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printk(BIOS_DEBUG, "End rcven\n");
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}
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static void sdram_save_receive_enable(void)
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{
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int i = 0;
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@ -1505,7 +1224,7 @@ static void sdram_program_receive_enable(struct sysinfo *s)
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|| (s->boot_path == BOOT_PATH_RESUME)) {
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sdram_recover_receive_enable();
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} else {
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rcven_ddr2(s);
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rcven(s);
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sdram_save_receive_enable();
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}
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}
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@ -0,0 +1,375 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
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* Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/io.h>
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#include <console/console.h>
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#include <delay.h>
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#include "iomap.h"
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#include "x4x.h"
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#define MAX_COARSE 15
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#define DQS_HIGH 1
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#define DQS_LOW 0
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#define RESET_CNTL(channel) (0x5d8 + channel * 0x400)
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struct rec_timing {
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u8 medium;
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u8 coarse;
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u8 pi;
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u8 tap;
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};
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static inline void barrier(void)
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{
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asm volatile("mfence":::);
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}
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static u8 sampledqs(u32 addr, u8 lane, u8 channel)
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{
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volatile u32 strobe;
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u32 sample_offset = 0x400 * channel + 0x561 + lane * 4;
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/* Reset the DQS probe */
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MCHBAR8(RESET_CNTL(channel)) &= ~0x2;
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udelay(2);
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MCHBAR8(RESET_CNTL(channel)) |= 0x2;
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udelay(2);
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barrier();
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strobe = read32((u32 *)addr);
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barrier();
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return (MCHBAR8(sample_offset) >> 6) & 1;
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}
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static void program_timing(const struct rec_timing *timing, u8 channel,
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u8 lane)
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{
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u32 reg32;
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u16 reg16;
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u8 reg8;
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printk(RAM_SPEW, " Programming timings:"
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"Coarse: %d, Medium: %d, TAP: %d, PI: %d\n",
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timing->coarse, timing->medium, timing->tap, timing->pi);
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reg32 = MCHBAR32(0x400 * channel + 0x248);
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reg32 &= ~0xf0000;
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reg32 |= timing->coarse << 16;
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MCHBAR32(0x400 * channel + 0x248) = reg32;
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reg16 = MCHBAR16(0x400 * channel + 0x58c);
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reg16 &= ~(3 << (lane * 2));
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reg16 |= timing->medium << (lane * 2);
|
||||
MCHBAR16(0x400 * channel + 0x58c) = reg16;
|
||||
|
||||
reg8 = MCHBAR8(0x400 * channel + 0x560 + lane * 4);
|
||||
reg8 &= ~0x7f;
|
||||
reg8 |= timing->tap;
|
||||
reg8 |= timing->pi << 4;
|
||||
MCHBAR8(0x400 * channel + 0x560 + lane * 4) = reg8;
|
||||
}
|
||||
|
||||
static int increase_medium(struct rec_timing *timing)
|
||||
{
|
||||
if (timing->medium < 3) {
|
||||
timing->medium++;
|
||||
} else if (timing->coarse < MAX_COARSE) {
|
||||
timing->medium = 0;
|
||||
timing->coarse++;
|
||||
} else {
|
||||
printk(BIOS_ERR, "Cannot increase medium any further.\n");
|
||||
return -1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int decrease_medium(struct rec_timing *timing)
|
||||
{
|
||||
if (timing->medium > 0) {
|
||||
timing->medium--;
|
||||
} else if (timing->coarse > 0) {
|
||||
timing->medium = 3;
|
||||
timing->coarse--;
|
||||
} else {
|
||||
printk(BIOS_ERR, "Cannot lower medium any further.\n");
|
||||
return -1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int increase_tap(struct rec_timing *timing)
|
||||
{
|
||||
if (timing->tap == 14) {
|
||||
if (increase_medium(timing))
|
||||
return -1;
|
||||
timing->tap = 0;
|
||||
} else {
|
||||
timing->tap++;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int decrease_tap(struct rec_timing *timing)
|
||||
{
|
||||
if (timing->tap > 0) {
|
||||
timing->tap--;
|
||||
} else {
|
||||
if (decrease_medium(timing))
|
||||
return -1;
|
||||
timing->tap = 14;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int decr_coarse_low(u8 channel, u8 lane, u32 addr,
|
||||
struct rec_timing *timing)
|
||||
{
|
||||
printk(BIOS_DEBUG,
|
||||
" Decreasing coarse until high to low transition is found\n");
|
||||
while (sampledqs(addr, lane, channel) != DQS_LOW) {
|
||||
if (timing->coarse == 0) {
|
||||
printk(BIOS_CRIT,
|
||||
"Couldn't find DQS-high 0 indicator, halt\n");
|
||||
return -1;
|
||||
}
|
||||
timing->coarse--;
|
||||
program_timing(timing, channel, lane);
|
||||
}
|
||||
printk(BIOS_DEBUG, " DQS low at coarse=%d medium=%d\n",
|
||||
timing->coarse, timing->medium);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int fine_search_dqs_high(u8 channel, u8 lane, u32 addr,
|
||||
struct rec_timing *timing)
|
||||
{
|
||||
printk(BIOS_DEBUG,
|
||||
" Increasing TAP until low to high transition is found\n");
|
||||
/*
|
||||
* We use a do while loop since it happens that the strobe read
|
||||
* is inconsistent, with the strobe already high. The current
|
||||
* code flow results in failure later when finding the preamble,
|
||||
* at which DQS needs to be high is often not the case if TAP was
|
||||
* not increased at least once here. Work around this by incrementing
|
||||
* TAP at least once to guarantee searching for preamble start at
|
||||
* DQS high.
|
||||
* This seems to be the result of hysteresis on some settings, where
|
||||
* the DQS probe is influenced by its previous value.
|
||||
*/
|
||||
if (sampledqs(addr, lane, channel) == DQS_HIGH) {
|
||||
printk(BIOS_WARNING,
|
||||
"DQS already HIGH... DQS probe is inconsistent!\n"
|
||||
"Continuing....\n");
|
||||
}
|
||||
do {
|
||||
if (increase_tap(timing)) {
|
||||
printk(BIOS_CRIT,
|
||||
"Could not find DQS-high on fine search.\n");
|
||||
return -1;
|
||||
}
|
||||
program_timing(timing, channel, lane);
|
||||
} while (sampledqs(addr, lane, channel) != DQS_HIGH);
|
||||
|
||||
printk(BIOS_DEBUG, " DQS high at coarse=%d medium=%d tap:%d\n",
|
||||
timing->coarse, timing->medium, timing->tap);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int find_dqs_low(u8 channel, u8 lane, u32 addr,
|
||||
struct rec_timing *timing)
|
||||
{
|
||||
/* Look for DQS low, using quarter steps. */
|
||||
printk(BIOS_DEBUG, " Increasing medium until DQS LOW is found\n");
|
||||
while (sampledqs(addr, lane, channel) != DQS_LOW) {
|
||||
if (increase_medium(timing)) {
|
||||
printk(BIOS_CRIT,
|
||||
"Coarse > 15: DQS tuning failed, halt\n");
|
||||
return -1;
|
||||
}
|
||||
program_timing(timing, channel, lane);
|
||||
}
|
||||
printk(BIOS_DEBUG, " DQS low at coarse=%d medium=%d\n",
|
||||
timing->coarse, timing->medium);
|
||||
return 0;
|
||||
}
|
||||
static int find_dqs_high(u8 channel, u8 lane, u32 addr,
|
||||
struct rec_timing *timing)
|
||||
{
|
||||
/* Look for DQS high, using quarter steps. */
|
||||
printk(BIOS_DEBUG, " Increasing medium until DQS HIGH is found\n");
|
||||
while (sampledqs(addr, lane, channel) != DQS_HIGH) {
|
||||
if (increase_medium(timing)) {
|
||||
printk(BIOS_CRIT,
|
||||
"Coarse > 16: DQS tuning failed, halt\n");
|
||||
return -1;
|
||||
}
|
||||
program_timing(timing, channel, lane);
|
||||
}
|
||||
printk(BIOS_DEBUG, " DQS high at coarse=%d medium=%d\n",
|
||||
timing->coarse, timing->medium);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int find_dqs_edge_lowhigh(u8 channel, u8 lane,
|
||||
u32 addr, struct rec_timing *timing)
|
||||
{
|
||||
/* Medium search for DQS high. */
|
||||
if (find_dqs_high(channel, lane, addr, timing))
|
||||
return -1;
|
||||
|
||||
/* Go back and perform finer search. */
|
||||
if (decrease_medium(timing))
|
||||
return -1;
|
||||
program_timing(timing, channel, lane);
|
||||
if (fine_search_dqs_high(channel, lane, addr, timing) < 0)
|
||||
return -1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int find_preamble(u8 channel, u8 lane, u32 addr,
|
||||
struct rec_timing *timing)
|
||||
{
|
||||
/* Add a quarter step */
|
||||
if (increase_medium(timing))
|
||||
return -1;
|
||||
program_timing(timing, channel, lane);
|
||||
/* Verify we are at high */
|
||||
if (sampledqs(addr, lane, channel) != DQS_HIGH) {
|
||||
printk(BIOS_CRIT, "Not at DQS high, d'oh\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* Decrease coarse until LOW is found */
|
||||
if (decr_coarse_low(channel, lane, addr, timing))
|
||||
return -1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int calibrate_receive_enable(u8 channel, u8 lane,
|
||||
u32 addr, struct rec_timing *timing)
|
||||
{
|
||||
program_timing(timing, channel, lane);
|
||||
/* Set receive enable bit */
|
||||
MCHBAR16(0x400 * channel + 0x588) = (MCHBAR16(0x400 * channel + 0x588)
|
||||
& ~(3 << (lane * 2))) | (1 << (lane * 2));
|
||||
|
||||
if (find_dqs_low(channel, lane, addr, timing))
|
||||
return -1;
|
||||
|
||||
/* Advance a little further. */
|
||||
if (increase_medium(timing)) {
|
||||
/* A finer search could be implemented */
|
||||
printk(BIOS_WARNING, "Cannot increase medium further");
|
||||
return -1;
|
||||
}
|
||||
program_timing(timing, channel, lane);
|
||||
|
||||
if (find_dqs_edge_lowhigh(channel, lane, addr, timing))
|
||||
return -1;
|
||||
|
||||
/* Go back on fine search */
|
||||
if (decrease_tap(timing))
|
||||
return -1;
|
||||
timing->pi = 3;
|
||||
program_timing(timing, channel, lane);
|
||||
|
||||
if (find_preamble(channel, lane, addr, timing))
|
||||
return -1;
|
||||
|
||||
if (find_dqs_edge_lowhigh(channel, lane, addr, timing))
|
||||
return -1;
|
||||
if (decrease_tap(timing))
|
||||
return -1;
|
||||
timing->pi = 7;
|
||||
program_timing(timing, channel, lane);
|
||||
|
||||
/* Unset receive enable bit */
|
||||
MCHBAR16(0x400 * channel + 0x588) = MCHBAR16(0x400 * channel + 0x588) &
|
||||
~(3 << (lane * 2));
|
||||
return 0;
|
||||
}
|
||||
|
||||
void rcven(const struct sysinfo *s)
|
||||
{
|
||||
int i;
|
||||
u8 channel, lane, reg8;
|
||||
u32 addr;
|
||||
struct rec_timing timing[8];
|
||||
u8 mincoarse;
|
||||
|
||||
MCHBAR8(0x5d8) = MCHBAR8(0x5d8) & ~0xc;
|
||||
MCHBAR8(0x9d8) = MCHBAR8(0x9d8) & ~0xc;
|
||||
MCHBAR8(0x5dc) = MCHBAR8(0x5dc) & ~0x80;
|
||||
FOR_EACH_POPULATED_CHANNEL(s->dimms, channel) {
|
||||
addr = (channel << 29);
|
||||
mincoarse = 0xff;
|
||||
for (i = 0; i < RANKS_PER_CHANNEL &&
|
||||
!RANK_IS_POPULATED(s->dimms, channel, i); i++)
|
||||
addr += 128 * MiB;
|
||||
for (lane = 0; lane < 8; lane++) {
|
||||
printk(BIOS_DEBUG, "Channel %d, Lane %d addr=0x%08x\n",
|
||||
channel, lane, addr);
|
||||
timing[lane].coarse = (s->selected_timings.CAS + 1);
|
||||
switch (lane) {
|
||||
default:
|
||||
case 0:
|
||||
case 1:
|
||||
timing[lane].medium = 0;
|
||||
break;
|
||||
case 2:
|
||||
case 3:
|
||||
timing[lane].medium = 1;
|
||||
break;
|
||||
case 4:
|
||||
case 5:
|
||||
timing[lane].medium = 2;
|
||||
break;
|
||||
case 6:
|
||||
case 7:
|
||||
timing[lane].medium = 3;
|
||||
break;
|
||||
}
|
||||
timing[lane].tap = 0;
|
||||
timing[lane].pi = 0;
|
||||
|
||||
if (calibrate_receive_enable(channel, lane, addr,
|
||||
&timing[lane]))
|
||||
die("Receive enable calibration failed\n");
|
||||
if (mincoarse > timing[lane].coarse)
|
||||
mincoarse = timing[lane].coarse;
|
||||
}
|
||||
printk(BIOS_DEBUG, "Found min coarse value = %d\n", mincoarse);
|
||||
printk(BIOS_DEBUG, "Receive enable, final timings:\n");
|
||||
/* Normalise coarse */
|
||||
for (lane = 0; lane < 8; lane++) {
|
||||
if (timing[lane].coarse == 0)
|
||||
reg8 = 0;
|
||||
else
|
||||
reg8 = timing[lane].coarse - mincoarse;
|
||||
printk(BIOS_DEBUG, "ch %d lane %d: coarse offset: %d;"
|
||||
"medium: %d; tap: %d\n",
|
||||
channel, lane, reg8, timing[lane].medium,
|
||||
timing[lane].tap);
|
||||
MCHBAR16(0x400 * channel + 0x5fa) &=
|
||||
~(3 << (lane * 2)) | (reg8 << (lane * 2));
|
||||
}
|
||||
/* simply use timing[0] to program mincoarse */
|
||||
timing[0].coarse = mincoarse;
|
||||
program_timing(&timing[0], channel, 0);
|
||||
}
|
||||
}
|
||||
|
|
@ -345,6 +345,7 @@ u32 decode_igd_gtt_size(u32 gsm);
|
|||
u8 decode_pciebar(u32 *const base, u32 *const len);
|
||||
void sdram_initialize(int boot_path, const u8 *spd_map);
|
||||
void raminit_ddr2(struct sysinfo *);
|
||||
void rcven(const struct sysinfo *);
|
||||
|
||||
struct acpi_rsdp;
|
||||
#ifndef __SIMPLE_DEVICE__
|
||||
|
|
|
|||
Loading…
Reference in New Issue