soc/intel: Fix microcode loading

Commit 1aa60a95bd broke microcode loading for chipsets that have a
microcode blob with a total_size field set to 0. This appears to be
support for older chipsets, where the size was set to 0 and assumed to
be 2048 bytes. The fix is to change the result of the subtraction to a
signed type, and ensure the following comparison is done without
promoting the signed type to an unsigned one.

Resolves: https://ticket.coreboot.org/issues/313
Change-Id: I62def8014fd3f3bbf607b4d58ddc4dca4c695622
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56153
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Stefan Ott <coreboot@desire.ch>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/cpu/intel/microcode/microcode.c

@@ -136,9 +136,9 @@ static struct ext_sig_table *ucode_get_ext_sig_table(const struct microcode *uco
 	/* header + ucode data blob size */
 	u32 size = ucode->data_size + sizeof(struct microcode);
 
-	size_t ext_tbl_len = ucode->total_size - size;
+	ssize_t ext_tbl_len = ucode->total_size - size;
 
-	if (ext_tbl_len < sizeof(struct ext_sig_table))
+	if (ext_tbl_len < (ssize_t)sizeof(struct ext_sig_table))
 		return NULL;
 
 	ext_tbl = (struct ext_sig_table *)((uintptr_t)ucode + size);