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mb/google/vilboz: update telemetry settings 

update the telemetry setting for second SDLE testing(for APU power adjusting).
Those values are used to power calibration the APU power and achieving
the best performance.

BUG=b:160698427
BRANCH=zork
TEST=emerge-zork coreboot

Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com>
Change-Id: I4cf5b8f090befd6a3c4990f44f2f200bc66aa1f4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44804
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Chris Wang 2020-08-26 13:59:12 +08:00 committed by Patrick Georgi
parent 19e22f554e
commit 6dbf4c8f03
1 changed files with 4 additions and 4 deletions
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8
src/mainboard/google/zork/variants/vilboz/overridetree.cb
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@ -18,10 +18,10 @@ chip soc/amd/picasso
# End : OPN Performance Configuration # End : OPN Performance Configuration
register "telemetry_vddcr_vdd_slope" = "32453" #mA register "telemetry_vddcr_vdd_slope" = "32643" #mA
register "telemetry_vddcr_vdd_offset" = "168" register "telemetry_vddcr_vdd_offset" = "208"
register "telemetry_vddcr_soc_slope" = "22644" #mA register "telemetry_vddcr_soc_slope" = "22742" #mA
register "telemetry_vddcr_soc_offset" = "-70" register "telemetry_vddcr_soc_offset" = "-83"
# USB OC pin mapping # USB OC pin mapping
register "usb_port_overcurrent_pin[1]" = "USB_OC_NONE" # LTE instead of USB C1 register "usb_port_overcurrent_pin[1]" = "USB_OC_NONE" # LTE instead of USB C1