GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

vx900: map the SPI controller 

This is required for Flashrom to work well.

Change-Id: Id756d86a7f3b34f816ea7a7ed78f159512f550d5
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/22258
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Lubomir Rintel 2017-10-31 09:42:46 +01:00 committed by Stefan Reinauer
parent fd470f7163
commit 6dd2f69878
2 changed files with 51 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

51
src/northbridge/via/vx900/lpc.c
View File

@ -184,9 +184,56 @@ static void vx900_lpc_init(device_t dev)
dump_pci_device(dev); dump_pci_device(dev);
} }
static void vx900_lpc_read_resources(device_t dev)
{
struct resource *res;
pci_dev_read_resources(dev);
/* MMIO space */
res = new_resource(dev, VX900_MMCONFIG_MBAR);
res->size = 0x1000;
res->align = 12;
res->gran = 12;
res->limit = 0xffffffff;
res->flags = IORESOURCE_MEM | IORESOURCE_RESERVE;
/* SPI controller */
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
res->size = 0x8;
res->align = 12;
res->gran = 12;
res->limit = 0xffffffff;
res->flags = IORESOURCE_MEM | IORESOURCE_RESERVE;
}
static void vx900_lpc_set_resources(device_t dev)
{
struct resource *mmio, *spi;
u32 reg;
mmio = find_resource(dev, VX900_MMCONFIG_MBAR);
if (mmio) {
report_resource_stored(dev, mmio, "<mmconfig>");
mmio->flags |= IORESOURCE_STORED;
reg = pci_read_config32(dev, VX900_MMCONFIG_MBAR);
reg &= 0xff000000;
reg |= mmio->base >> 8;
pci_write_config32(dev, VX900_MMCONFIG_MBAR, reg);
spi = find_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
if (spi) {
report_resource_stored(dev, spi, "<spi>");
spi->flags |= IORESOURCE_STORED;
/* Set base and the enable bit. */
((u32*)(uintptr_t)mmio->base)[0] = (spi->base | 0x01);
}
}
pci_dev_set_resources(dev);
}
static struct device_operations vx900_lpc_ops = { static struct device_operations vx900_lpc_ops = {
.read_resources = pci_dev_read_resources, .read_resources = vx900_lpc_read_resources,
.set_resources = pci_dev_set_resources, .set_resources = vx900_lpc_set_resources,
.enable_resources = pci_dev_enable_resources, .enable_resources = pci_dev_enable_resources,
.init = vx900_lpc_init, .init = vx900_lpc_init,
.scan_bus = scan_lpc_bus, .scan_bus = scan_lpc_bus,

2
src/northbridge/via/vx900/vx900.h
View File

@ -26,6 +26,8 @@
#define SMBUS_IO_BASE 0x500 #define SMBUS_IO_BASE 0x500
#define VX900_MMCONFIG_MBAR 0xbc
/* The maximum number of DIMM slots that the VX900 supports */ /* The maximum number of DIMM slots that the VX900 supports */
#define VX900_MAX_DIMM_SLOTS 2 #define VX900_MAX_DIMM_SLOTS 2
#define VX900_MAX_MEM_RANKS 4 #define VX900_MAX_MEM_RANKS 4