mb/(ich7): Use macro instead of magic number
Change-Id: Ida291ed9f3a509e9b96a5c254433db6f8028bfb2 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36322 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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@ -175,12 +175,12 @@ static void early_ich7_init(void)
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uint32_t reg32;
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/* program secondary mlt XXX byte? */
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pci_write_config8(PCI_DEV(0, 0x1e, 0), 0x1b, 0x20);
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pci_write_config8(PCI_DEV(0, 0x1e, 0), SMLT, 0x20);
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/* reset rtc power status */
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4);
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reg8 &= ~(1 << 2);
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pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, reg8);
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3);
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reg8 &= ~RTC_BATTERY_DEAD;
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pci_write_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3, reg8);
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/* usb transient disconnect */
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xad);
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@ -125,12 +125,12 @@ static void early_ich7_init(void)
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uint32_t reg32;
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// program secondary mlt XXX byte?
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pci_write_config8(PCI_DEV(0, 0x1e, 0), 0x1b, 0x20);
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pci_write_config8(PCI_DEV(0, 0x1e, 0), SMLT, 0x20);
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// reset rtc power status
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4);
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reg8 &= ~(1 << 2);
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pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, reg8);
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3);
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reg8 &= ~RTC_BATTERY_DEAD;
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pci_write_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3, reg8);
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// usb transient disconnect
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xad);
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@ -177,12 +177,12 @@ static void early_ich7_init(void)
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uint32_t reg32;
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// program secondary mlt XXX byte?
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pci_write_config8(PCI_DEV(0, 0x1e, 0), 0x1b, 0x20);
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pci_write_config8(PCI_DEV(0, 0x1e, 0), SMLT, 0x20);
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// reset rtc power status
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4);
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reg8 &= ~(1 << 2);
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pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, reg8);
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3);
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reg8 &= ~RTC_BATTERY_DEAD;
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pci_write_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3, reg8);
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// usb transient disconnect
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xad);
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@ -87,12 +87,12 @@ static void early_ich7_init(void)
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uint32_t reg32;
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// program secondary mlt XXX byte?
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pci_write_config8(PCI_DEV(0, 0x1e, 0), 0x1b, 0x20);
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pci_write_config8(PCI_DEV(0, 0x1e, 0), SMLT, 0x20);
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// reset rtc power status
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4);
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reg8 &= ~(1 << 2);
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pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, reg8);
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3);
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reg8 &= ~RTC_BATTERY_DEAD;
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pci_write_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3, reg8);
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// usb transient disconnect
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xad);
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@ -149,12 +149,12 @@ static void early_ich7_init(void)
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uint32_t reg32;
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// program secondary mlt XXX byte?
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pci_write_config8(PCI_DEV(0, 0x1e, 0), 0x1b, 0x20);
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pci_write_config8(PCI_DEV(0, 0x1e, 0), SMLT, 0x20);
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// reset rtc power status
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4);
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reg8 &= ~(1 << 2);
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pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, reg8);
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3);
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reg8 &= ~RTC_BATTERY_DEAD;
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pci_write_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3, reg8);
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// usb transient disconnect
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xad);
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@ -69,12 +69,12 @@ static void early_ich7_init(void)
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uint32_t reg32;
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// program secondary mlt XXX byte?
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pci_write_config8(PCI_DEV(0, 0x1e, 0), 0x1b, 0x20);
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pci_write_config8(PCI_DEV(0, 0x1e, 0), SMLT, 0x20);
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// reset rtc power status
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4);
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reg8 &= ~(1 << 2);
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pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, reg8);
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3);
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reg8 &= ~RTC_BATTERY_DEAD;
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pci_write_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3, reg8);
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// usb transient disconnect
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xad);
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@ -192,12 +192,12 @@ static void early_ich7_init(void)
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uint32_t reg32;
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/* program secondary mlt XXX byte? */
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pci_write_config8(PCI_DEV(0, 0x1e, 0), 0x1b, 0x20);
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pci_write_config8(PCI_DEV(0, 0x1e, 0), SMLT, 0x20);
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/* reset rtc power status */
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4);
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reg8 &= ~(1 << 2);
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pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, reg8);
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3);
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reg8 &= ~RTC_BATTERY_DEAD;
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pci_write_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3, reg8);
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/* usb transient disconnect */
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xad);
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@ -109,12 +109,12 @@ static void early_ich7_init(void)
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uint32_t reg32;
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// program secondary mlt XXX byte?
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pci_write_config8(PCI_DEV(0, 0x1e, 0), 0x1b, 0x20);
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pci_write_config8(PCI_DEV(0, 0x1e, 0), SMLT, 0x20);
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// reset rtc power status
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4);
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reg8 &= ~(1 << 2);
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pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, reg8);
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3);
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reg8 &= ~RTC_BATTERY_DEAD;
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pci_write_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3, reg8);
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// usb transient disconnect
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xad);
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@ -109,12 +109,12 @@ static void early_ich7_init(void)
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uint32_t reg32;
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// program secondary mlt XXX byte?
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pci_write_config8(PCI_DEV(0, 0x1e, 0), 0x1b, 0x20);
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pci_write_config8(PCI_DEV(0, 0x1e, 0), SMLT, 0x20);
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// reset rtc power status
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4);
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reg8 &= ~(1 << 2);
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pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, reg8);
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3);
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reg8 &= ~RTC_BATTERY_DEAD;
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pci_write_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3, reg8);
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// usb transient disconnect
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xad);
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@ -141,12 +141,12 @@ static void early_ich7_init(void)
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uint32_t reg32;
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/* program secondary mlt XXX byte? */
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pci_write_config8(PCI_DEV(0, 0x1e, 0), 0x1b, 0x20);
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pci_write_config8(PCI_DEV(0, 0x1e, 0), SMLT, 0x20);
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/* reset rtc power status */
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4);
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reg8 &= ~(1 << 2);
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pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, reg8);
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3);
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reg8 &= ~RTC_BATTERY_DEAD;
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pci_write_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3, reg8);
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/* usb transient disconnect */
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reg8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xad);
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