cpu/intel/common: Define build time physical address reserved bits
According the Intel Software Developer Manual, CPUID.80000008H:EAX[15:8] reports the physical-address width supported by the processor. Unfortunately, it does not necessarily reflect the physical-address space the system can actulally use as some of those bits can be reserved for internal hardware use. It is critical for coreboot to know the actual physical address size. Overestimating this size can lead to device resource overlaps due to the hardware ignoring upper reserved bits. On rex for instance, it creates some reboot hangs due to an overlap between thunderbolt and Input Output Manager (IOM) address space. As some SoCs, such as Meteor Lake, have physical address reserved bits which cannot be probed at runtime, this commit introduces `CPU_INTEL_COMMON_RESERVED_PHYS_ADDR_BITS' Kconfig to set the number of physical address reserved bits at compilation time for those SoCs. A runtime detection by hardware probing will be attempted if the value is 0 (default). BUG=b:288978352 Change-Id: I8748fa3e5bdfd339e973d562c5a201d5616f813e Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78451 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
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@ -31,6 +31,14 @@ config SET_MSR_AESNI_LOCK_BIT
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config CPU_INTEL_COMMON_TIMEBASE
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bool
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config CPU_INTEL_COMMON_RESERVED_PHYS_ADDR_BITS
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int
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help
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Specify the number of physical address reserved bits. This
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config can be set for SoCs with reserved bits which cannot
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be probed at runtime. A runtime detection by hardware
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probing will be attempted if the value is -1.
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endif
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config CPU_INTEL_COMMON_VOLTAGE
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@ -258,6 +258,9 @@ static unsigned int get_tme_keyid_bits(void)
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unsigned int get_reserved_phys_addr_bits(void)
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{
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if (CONFIG_CPU_INTEL_COMMON_RESERVED_PHYS_ADDR_BITS)
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return CONFIG_CPU_INTEL_COMMON_RESERVED_PHYS_ADDR_BITS;
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if (!is_tme_supported())
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return 0;
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