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mb/google/poppy/variants/nami: Fix SoC I2C CLK is abnormal 

The I2C CLKs of SoC should be 400kHz, but waveform show 460kHz to
470kHz. Add I2C parameters to adjust I2C CLKs which 5% lower than
400kHz.

BUG=b:78819970
TEST=The I2C CLKs are 5% lower than 400kHz.

Change-Id: I2c3012b5b59c089801cda8fd7b0c433aad9df36d
Signed-off-by: Chris Zhou <chris_zhou@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/26282
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Shelley Chen <shchen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Chris Zhou 2018-05-14 19:07:43 +08:00 committed by Patrick Georgi
parent a613ccd18b
commit 6e09b3bde9
1 changed files with 37 additions and 0 deletions
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37
src/mainboard/google/poppy/variants/nami/devicetree.cb
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@ -197,15 +197,52 @@ chip soc/intel/skylake
# Touchscreen
register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3"
register "i2c[0]" = "{
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 185,
.scl_hcnt = 90,
.sda_hold = 36,
},
}"
# Trackpad
register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3"
register "i2c[1]" = "{
.early_init = 1,
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 185,
.scl_hcnt = 90,
.sda_hold = 36,
},
}"
# Pen
register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8"
register "i2c[2]" = "{
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 185,
.scl_hcnt = 100,
.sda_hold = 36,
},
}"
# Audio
register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8"
register "i2c[3]" = "{
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 195,
.scl_hcnt = 90,
.sda_hold = 36,
},
}"
# Use GSPI0 for cr50 TPM. Early init is required to set up a BAR for TPM
# communication before memory is up.