soc/intel/common/block/fast_spi: Add SPI BIOS decode lock

The SPI BIOS decode lock bit needs to be set, according to
Intel EBG EDS dodcumentation.

Signed-off-by: Tim Chu <Tim.Chu@quantatw.com>
Change-Id: I3366817b42a5878f16575698ebc546fa7852e285
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71953
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
This commit is contained in:
Tim Chu 2022-12-08 09:02:34 +00:00 committed by Felix Held
parent ebe7f7cee0
commit 6e0c78b87f
3 changed files with 13 additions and 0 deletions

View File

@ -457,6 +457,13 @@ void fast_spi_disable_wp(void)
pci_write_config8(dev, SPI_BIOS_CONTROL, bios_cntl); pci_write_config8(dev, SPI_BIOS_CONTROL, bios_cntl);
} }
void fast_spi_set_bde(void)
{
const pci_devfn_t dev = PCH_DEV_SPI;
pci_or_config32(dev, SPI_BIOS_DECODE_EN, SPI_BIOS_DECODE_LOCK);
}
void fast_spi_clear_outstanding_status(void) void fast_spi_clear_outstanding_status(void)
{ {
void *spibar = fast_spi_get_bar(); void *spibar = fast_spi_get_bar();

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@ -4,6 +4,8 @@
#define SOC_INTEL_COMMON_BLOCK_FAST_SPI_DEF_H #define SOC_INTEL_COMMON_BLOCK_FAST_SPI_DEF_H
/* PCI configuration registers */ /* PCI configuration registers */
#define SPI_BIOS_DECODE_EN 0xd8
#define SPI_BIOS_DECODE_LOCK BIT(31)
#define SPI_BIOS_CONTROL 0xdc #define SPI_BIOS_CONTROL 0xdc

View File

@ -103,5 +103,9 @@ uint32_t soc_get_spi_psf_destination_id(void);
*/ */
struct postcar_frame; struct postcar_frame;
void fast_spi_cache_ext_bios_postcar(struct postcar_frame *pcf); void fast_spi_cache_ext_bios_postcar(struct postcar_frame *pcf);
/*
* Set FAST_SPIBAR BIOS Decode Lock bit
*/
void fast_spi_set_bde(void);
#endif /* SOC_INTEL_COMMON_BLOCK_FAST_SPI_H */ #endif /* SOC_INTEL_COMMON_BLOCK_FAST_SPI_H */