arm64: Add mmu context save/restore APIs
New API required by sdm845 DDR init/training protocol TEST=build & run Change-Id: I8442442c0588dd6fb5e461b399e48a761f7bbf29 Signed-off-by: T Michael Turney <mturney@codeaurora.org> Reviewed-on: https://review.coreboot.org/25818 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
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@ -274,6 +274,40 @@ void mmu_init(void)
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TCR_TBI_USED);
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}
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/* Func : mmu_save_context
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* Desc : Save mmu context (registers and ttbr base).
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*/
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void mmu_save_context(struct mmu_context *mmu_context)
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{
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assert(mmu_context);
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/* Back-up MAIR_ATTRIBUTES */
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mmu_context->mair = raw_read_mair_el3();
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/* Back-up TCR value */
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mmu_context->tcr = raw_read_tcr_el3();
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}
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/* Func : mmu_restore_context
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* Desc : Restore mmu context using input backed-up context
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*/
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void mmu_restore_context(const struct mmu_context *mmu_context)
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{
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assert(mmu_context);
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/* Restore TTBR */
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raw_write_ttbr0_el3((uintptr_t)_ttb);
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/* Restore MAIR indices */
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raw_write_mair_el3(mmu_context->mair);
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/* Restore TCR flags */
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raw_write_tcr_el3(mmu_context->tcr);
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/* invalidate tlb since ttbr is updated. */
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tlb_invalidate_all();
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}
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void mmu_enable(void)
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{
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if (((get_pte(_ttb) >> BLOCK_INDEX_SHIFT) & BLOCK_INDEX_MASK)
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@ -148,8 +148,17 @@
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#define TCR_TBI_USED (0x0 << TCR_TBI_SHIFT)
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#define TCR_TBI_IGNORED (0x1 << TCR_TBI_SHIFT)
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struct mmu_context {
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uint64_t mair; /* MAIR attributes */
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uint64_t tcr; /* TCR Attributes */
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};
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/* Initialize MMU registers and page table memory region. */
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void mmu_init(void);
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/* Desc : Save mmu context (registers and ttbr base/size). */
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void mmu_save_context(struct mmu_context *mmu_context);
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/* Desc : Restore mmu context using input backed-up context */
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void mmu_restore_context(const struct mmu_context *mmu_context);
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/* Change a memory type for a range of bytes at runtime. */
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void mmu_config_range(void *start, size_t size, uint64_t tag);
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/* Enable the MMU (need previous mmu_init() and configured ranges!). */
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