diff --git a/src/console/Kconfig b/src/console/Kconfig index 28070393db..7d6fa0e36f 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -184,6 +184,15 @@ config CONSOLE_CBMEM_BUFFER_SIZE value (128K or 0x20000 bytes) is large enough to accommodate even the BIOS_SPEW level. +config CONSOLE_CBMEM_DUMP_TO_UART + depends on !CONSOLE_SERIAL + bool "Dump CBMEM console on resets" + default n + help + Enable this to have CBMEM console buffer contents dumped on the + serial output in case serial console is disabled and the device + resets itself while trying to boot the payload. + endif config CONSOLE_QEMU_DEBUGCON diff --git a/src/include/console/cbmem_console.h b/src/include/console/cbmem_console.h index 343145952c..8f7fcb262f 100644 --- a/src/include/console/cbmem_console.h +++ b/src/include/console/cbmem_console.h @@ -43,4 +43,5 @@ static inline void __cbmemc_init(void) {} static inline void __cbmemc_tx_byte(u8 data) {} #endif +void cbmem_dump_console(void); #endif diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index 628d3b9c1f..9d292bfb58 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -19,6 +19,7 @@ #include #include +#include #include #include #include @@ -236,5 +237,21 @@ void cbmemc_reinit(void) init_console_ptr(cbm_cons_p, size, flags); } +#if IS_ENABLED(CONFIG_CONSOLE_CBMEM_DUMP_TO_UART) +void cbmem_dump_console(void) +{ + struct cbmem_console *cbm_cons_p; + int cursor; + + cbm_cons_p = current_console(); + if (!cbm_cons_p) + return; + + uart_init(0); + for (cursor = 0; cursor < cbm_cons_p->buffer_cursor; cursor++) + uart_tx_byte(0, cbm_cons_p->buffer_body[cursor]); +} +#endif + /* Call cbmemc_reinit() at CAR migration time. */ CAR_MIGRATE(cbmemc_reinit) diff --git a/src/vendorcode/google/chromeos/vboot.c b/src/vendorcode/google/chromeos/vboot.c index 44fe9e3025..a151f54619 100644 --- a/src/vendorcode/google/chromeos/vboot.c +++ b/src/vendorcode/google/chromeos/vboot.c @@ -234,6 +234,8 @@ static void init_vboot(int bootmode) #if !MOCK_TPM printk(BIOS_ERR, "TPM: Error code 0x%x. Hard reset!\n", result); post_code(POST_TPM_FAILURE); + if (IS_ENABLED(CONFIG_CONSOLE_CBMEM_DUMP_TO_UART)) + cbmem_dump_console(); hard_reset(); #endif } diff --git a/src/vendorcode/google/chromeos/vboot_common.c b/src/vendorcode/google/chromeos/vboot_common.c index bacacd4647..2e0ab2b75a 100644 --- a/src/vendorcode/google/chromeos/vboot_common.c +++ b/src/vendorcode/google/chromeos/vboot_common.c @@ -130,6 +130,8 @@ void *vboot_get_payload(int *len) void vboot_reboot(void) { + if (IS_ENABLED(CONFIG_CONSOLE_CBMEM_DUMP_TO_UART)) + cbmem_dump_console(); hard_reset(); die("failed to reboot"); }