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mb/google/brya/{var/agah,acpi}: Update GPU GCOFF sequence for power down 

We have clarified the powerdown sequence with Nvidia, and the EEs have
come up with this modified sequence which still meets the requirements
from the hardware design guide.

BUG=b:233959099
TEST=Verified by ODM and EE

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I37715165ab488f994c825fb9ff532ebf8d7f4cb0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65182
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Robert Zieba <robertzieba@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Tim Wawrzynczak 2022-06-16 13:41:28 -06:00 committed by Felix Held
parent 4e4edf7d60
commit 6e25ab79cd
2 changed files with 12 additions and 12 deletions
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18
src/mainboard/google/brya/acpi/power.asl
View File

@ -170,25 +170,25 @@ Method (PGOF, 0, Serialized)
/* All rails are about to go down */
\_SB.PCI0.CTXS (GPIO_GPU_ALLRAILS_PG)
/* Ramp down NV33 and let rail discharge to <10% */
\_SB.PCI0.CTXS (GPIO_NV33_PWR_EN)
GPPL (GPIO_NV33_PG, 0, 20)
Sleep (15)
/* Ramp down FBVDD (active-low) and let rail discharge to <10% */
\_SB.PCI0.STXS (GPIO_FBVDD_PWR_EN)
GPPL (GPIO_FBVDD_PG, 0, 20)
Sleep (150)
/* Ramp down PEXVDD and let rail discharge to <10% */
\_SB.PCI0.CTXS (GPIO_PEXVDD_PWR_EN)
GPPL (GPIO_PEXVDD_PG, 0, 20)
Sleep (2)
Sleep (10)
/* Ramp down NVVDD and let rail discharge to <10% */
\_SB.PCI0.CTXS (GPIO_NVVDD_PWR_EN)
GPPL (GPIO_NVVDD_PG, 0, 20)
Sleep (2)
/* Ramp down FBVDD (active-low) and let rail discharge to <10% */
\_SB.PCI0.STXS (GPIO_FBVDD_PWR_EN)
GPPL (GPIO_FBVDD_PG, 0, 20)
Sleep (150)
/* Ramp down NV33 and let rail discharge to <10% */
\_SB.PCI0.CTXS (GPIO_NV33_PWR_EN)
GPPL (GPIO_NV33_PG, 0, 20)
Sleep (4)
/* Ramp down 1.8V */
\_SB.PCI0.CTXS (GPIO_1V8_PWR_EN)

6
src/mainboard/google/brya/variants/agah/variant.c
View File

@ -56,10 +56,10 @@ static const struct power_rail_sequence gpu_on_seq[] = {
/* In GCOFF entry order (i.e., power-off order) */
static const struct power_rail_sequence gpu_off_seq[] = {
{ "NV3_3", NV33_PWR_EN, false, NV33_PG, 15,},
{ "PEXVDD", PEXVDD_PWR_EN, false, PEXVDD_PG, 2,},
{ "NVVDD+MSVDD", NVVDD_PWR_EN, false, NVVDD_PG, 2,},
{ "FBVDD", FBVDD_PWR_EN, true, FBVDD_PG, 150,},
{ "PEXVDD", PEXVDD_PWR_EN, false, PEXVDD_PG, 10,},
{ "NVVDD+MSVDD", NVVDD_PWR_EN, false, NVVDD_PG, 2,},
{ "NV3_3", NV33_PWR_EN, false, NV33_PG, 4,},
{ "GPU 1.8V", GPU_1V8_PWR_EN, false, GPU_1V8_PG, 0,},
};