From 6e651aaf4e0705722ce4bc499ee44d9a7cf9891e Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 3 Nov 2020 13:09:02 -0600 Subject: [PATCH] mb/purism/librem_mini: drop unused HeciEnabled register MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit this should have been corrected as part of: commit 3de90d1 [soc/intel/cnl: Set Heci1Disable depending on devicetree config] Change-Id: I6a103a1de01fc258ef359258a8a64f4c5a181139 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/47187 Reviewed-by: Angel Pons Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) --- .../purism/librem_cnl/variants/librem_mini/devicetree.cb | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb index 9d2b34b16c..ae19b041b5 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb +++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb @@ -204,10 +204,7 @@ chip soc/intel/cannonlake device pci 15.1 off end # I2C #1 device pci 15.2 off end # I2C #2 device pci 15.3 off end # I2C #3 - device pci 16.0 off # Management Engine Interface 1 - # HECI must be enabled w/HAP disable else S3 issues - register "HeciEnabled" = "1" - end + device pci 16.0 off end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT Redirection