no default rom size
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1134 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -69,7 +69,7 @@ option MAINBOARD_VENDOR="ARIMA"
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###
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###
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## ROM_SIZE is the size of boot ROM that this board will use.
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## ROM_SIZE is the size of boot ROM that this board will use.
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option ROM_SIZE = 524288
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default ROM_SIZE = 524288
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## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
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## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
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option ROM_IMAGE_SIZE = 65536
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option ROM_IMAGE_SIZE = 65536
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@ -19,6 +19,8 @@
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#include "debug.c"
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#include "debug.c"
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#define SIO_BASE 0x2e
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#define SIO_BASE 0x2e
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#define MAXIMUM_CONSOLE_LOGLEVEL 9
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#define DEFAULT_CONSOLE_LOGLEVEL 9
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static void memreset_setup(void)
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static void memreset_setup(void)
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{
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{
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@ -199,7 +201,7 @@ static void main(void)
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enumerate_ht_chain(0);
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enumerate_ht_chain(0);
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distinguish_cpu_resets(0);
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distinguish_cpu_resets(0);
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#if 0
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#if 1
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print_pci_devices();
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print_pci_devices();
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#endif
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#endif
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enable_smbus();
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enable_smbus();
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@ -209,10 +211,10 @@ static void main(void)
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memreset_setup();
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memreset_setup();
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sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
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sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
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#if 0
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#if 1
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dump_pci_devices();
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dump_pci_devices();
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#endif
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#endif
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#if 0
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#if 1
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dump_pci_device(PCI_DEV(0, 0x18, 2));
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dump_pci_device(PCI_DEV(0, 0x18, 2));
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#endif
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#endif
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@ -12,7 +12,7 @@ const struct irq_routing_table intel_irq_routing_table = {
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PIRQ_SIGNATURE, /* u32 signature */
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PIRQ_SIGNATURE, /* u32 signature */
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PIRQ_VERSION, /* u16 version */
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PIRQ_VERSION, /* u16 version */
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32+16*18, /* there can be total 18 devices on the bus */
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32+16*18, /* there can be total 18 devices on the bus */
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0, /* Where the interrupt router lies (bus) */
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1, /* Where the interrupt router lies (bus) */
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0x23, /* Where the interrupt router lies (dev) */
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0x23, /* Where the interrupt router lies (dev) */
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0, /* IRQs devoted exclusively to PCI usage */
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0, /* IRQs devoted exclusively to PCI usage */
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0x1022, /* Vendor */
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0x1022, /* Vendor */
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@ -25,8 +25,8 @@ const struct irq_routing_table intel_irq_routing_table = {
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{0,0x50, {{0x1, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
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{0,0x50, {{0x1, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
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{0x2,0x8, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x3, 0},
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{0x2,0x8, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x3, 0},
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{0x2,0x10, {{0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}}, 0x4, 0},
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{0x2,0x10, {{0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}}, 0x4, 0},
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{0x1,0x18, {{0x4, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0x0, 0},
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{0x2,0x18, {{0x4, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0x0, 0},
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{0x1,0x20, {{0x4, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0x0, 0},
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{0x2,0x20, {{0x4, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0x0, 0},
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{0x2,0x28, {{0x2, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0xa, 0},
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{0x2,0x28, {{0x2, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0xa, 0},
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{0,0x58, {{0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
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{0,0x58, {{0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
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{0x3,0x8, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x1, 0},
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{0x3,0x8, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x1, 0},
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