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mb/google/rex: Update GPIO PAD as per Proto 2 schematics 

BUG=b:283477280
TEST=Able to build and boot google/rex as per Proto 2 schematics
dated 05/16.

+-----------------+------------------------------------+---------------------------+--------+
|     GPIO        |  In Proto 1                        |  In Proto 2               | Impact |
+-----------------+------------------------------------+---------------------------+--------+
|   GPP_C01       |  SOC_TCHSCR_RST_L                  | SOC_TCHSCR_RST_R_L        |  N     |
+-----------------+------------------------------------+---------------------------+--------+
|   GPP_D19       |  NC                                | EC_SOC_REC_SWITCH_ODL     |  Y     |
+-----------------+------------------------------------+---------------------------+--------+
|   GPP_E04       |  HPS_INT_L                         | SOC_PEN_DETECT            |  N     |
+-----------------+------------------------------------+---------------------------+--------+
|   GPP_E17       |  EN_HPS_PWR                        | EN_PP3300_SPARE_X         |  N     |
+-----------------+------------------------------------+---------------------------+--------+
|   GPP_F13       |  GSPI1_SOC_MISO                    | GSPI1_SOC_MISO_R          |  N     |
+-----------------+------------------------------------+---------------------------+--------+
|   GPP_F21       |  GPIO_F21_SPI_CS_L                 | SPI_SOC_CS_UWB_L_STRAP    |  N     |
+-----------------+------------------------------------+---------------------------+--------+
|   GPP_H00       |  GPIO_H00_SPI_CLK_R                | SPI_SOC_CLK_UWB_STRAP_R   |  N     |
+-----------------+------------------------------------+---------------------------+--------+
|   GPP_H01       |  GPIO_H01_SPI_MOSI_R               | SPI_SOC_DO_UWB_DI_STRAP_R |  N     |
+-----------------+------------------------------------+---------------------------+--------+
|   GPP_H02       |  GPIO_H02_SPI_MISO                 | SPI_SOC_DI_UWB_DO_STRAP   |  N     |
+-----------------+------------------------------------+---------------------------+--------+
|   GPP_S00       |  UNNAMED_8_METEORLAKEU_I137_GPPS00 | SDW_HP_CLK_WLAN_PCM_CLK   |  N     |
+-----------------+------------------------------------+---------------------------+--------+
|   GPP_S01       |  UNNAMED_8_METEORLAKEU_I137_GPPS01 | SDW_HP_DATA_WLAN_PCM_SYNC |  N     |
+-----------------+------------------------------------+---------------------------+--------+
|   GPP_S02       |  UNNAMED_8_METEORLAKEU_I137_GPPS02 | DMIC_SOC_CLK0_WLAN_PCM_OUT|  N     |
+-----------------+------------------------------------+---------------------------+--------+
|   GPP_S03       |  UNNAMED_8_METEORLAKEU_I137_GPPS03 | DMIC_SOC_DATA0_WLAN_PCM_IN|  N     |
+-----------------+------------------------------------+---------------------------+--------+

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I4a8c43b0f845d3446188b7c926e482f91e5b45aa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75407
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Subrata Banik 2023-05-24 15:18:48 +05:30
parent 7473671b8b
commit 6e827a8b24
1 changed files with 15 additions and 15 deletions
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30
src/mainboard/google/rex/variants/rex0/gpio.c
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@ -96,7 +96,7 @@ static const struct pad_config gpio_table[] = {
/* GPP_C00 : [] ==> EN_TCHSCR_PWR */ /* GPP_C00 : [] ==> EN_TCHSCR_PWR */
PAD_CFG_GPO(GPP_C00, 0, DEEP), PAD_CFG_GPO(GPP_C00, 0, DEEP),
/* GPP_C01 : [] ==> SOC_TCHSCR_RST_L */ /* GPP_C01 : [] ==> SOC_TCHSCR_RST_R_L */
PAD_CFG_GPO(GPP_C01, 0, DEEP), PAD_CFG_GPO(GPP_C01, 0, DEEP),
/* GPP_C02 : SOC_TCHSCR_SPI_INT_STRAP ==> Component NC */ /* GPP_C02 : SOC_TCHSCR_SPI_INT_STRAP ==> Component NC */
PAD_NC(GPP_C02, NONE), PAD_NC(GPP_C02, NONE),
@ -179,8 +179,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF2), PAD_CFG_NF(GPP_D17, NONE, DEEP, NF2),
/* GPP_D18 : net NC is not present in the given design */ /* GPP_D18 : net NC is not present in the given design */
PAD_NC(GPP_D18, NONE), PAD_NC(GPP_D18, NONE),
/* GPP_D19 : net NC is not present in the given design */ /* GPP_D19 : [] ==> EC_SOC_REC_SWITCH_ODL */
PAD_NC(GPP_D19, NONE), PAD_CFG_GPI_LOCK(GPP_D19, NONE, LOCK_CONFIG),
/* GPP_D20 : net NC is not present in the given design */ /* GPP_D20 : net NC is not present in the given design */
PAD_NC(GPP_D20, NONE), PAD_NC(GPP_D20, NONE),
/* GPP_D21 : [] ==> WLAN_CLKREQ_ODLl */ /* GPP_D21 : [] ==> WLAN_CLKREQ_ODLl */
@ -198,7 +198,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI_LOCK(GPP_E02, NONE, LOCK_CONFIG), PAD_CFG_GPI_LOCK(GPP_E02, NONE, LOCK_CONFIG),
/* GPP_E03 : [] ==> GSC_SOC_INT_ODL */ /* GPP_E03 : [] ==> GSC_SOC_INT_ODL */
PAD_CFG_GPI_APIC_LOCK(GPP_E03, NONE, LEVEL, INVERT, LOCK_CONFIG), PAD_CFG_GPI_APIC_LOCK(GPP_E03, NONE, LEVEL, INVERT, LOCK_CONFIG),
/* GPP_E04 : [] ==> PEN_DETECT */ /* GPP_E04 : [] ==> SOC_PEN_DETECT */
PAD_CFG_GPI_IRQ_WAKE(GPP_E04, NONE, PLTRST, LEVEL, INVERT), PAD_CFG_GPI_IRQ_WAKE(GPP_E04, NONE, PLTRST, LEVEL, INVERT),
/* GPP_E05 : [] ==> USB_A0_RT_RST_ODL */ /* GPP_E05 : [] ==> USB_A0_RT_RST_ODL */
PAD_CFG_GPO(GPP_E05, 1, DEEP), PAD_CFG_GPO(GPP_E05, 1, DEEP),
@ -224,8 +224,8 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_E15, NONE), PAD_NC(GPP_E15, NONE),
/* GPP_E16 : net NC. Test pad. */ /* GPP_E16 : net NC. Test pad. */
PAD_NC(GPP_E16, NONE), PAD_NC(GPP_E16, NONE),
/* GPP_E17 : [] ==> EN_HPS_PWR */ /* GPP_E17 : net NC is not present in the given design */
PAD_CFG_GPO(GPP_E17, 1, DEEP), PAD_NC(GPP_E17, NONE),
/* GPP_E22 : [] ==> EN_PP3300_WLAN */ /* GPP_E22 : [] ==> EN_PP3300_WLAN */
PAD_CFG_GPO(GPP_E22, 1, DEEP), PAD_CFG_GPO(GPP_E22, 1, DEEP),
@ -255,7 +255,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_F11, NONE, DEEP, NF5), PAD_CFG_NF(GPP_F11, NONE, DEEP, NF5),
/* GPP_F12 : GSPI1_SOC_DO_FPMCU_DI_R */ /* GPP_F12 : GSPI1_SOC_DO_FPMCU_DI_R */
PAD_CFG_NF(GPP_F12, NONE, DEEP, NF5), PAD_CFG_NF(GPP_F12, NONE, DEEP, NF5),
/* GPP_F13 : GSPI1_SOC_DI_FPMCU_DO_LS */ /* GPP_F13 : GSPI1_SOC_DI_FPMCU_DO_LS_R */
PAD_CFG_NF(GPP_F13, NONE, DEEP, NF5), PAD_CFG_NF(GPP_F13, NONE, DEEP, NF5),
/* GPP_F14 : GSPI0_SOC_DO_TCHSCR_DI */ /* GPP_F14 : GSPI0_SOC_DO_TCHSCR_DI */
PAD_CFG_NF(GPP_F14, NONE, DEEP, NF8), PAD_CFG_NF(GPP_F14, NONE, DEEP, NF8),
@ -271,18 +271,18 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_F19, NONE), PAD_NC(GPP_F19, NONE),
/* GPP_F20 : [] ==> GPP_F20_STRAP */ /* GPP_F20 : [] ==> GPP_F20_STRAP */
PAD_NC(GPP_F20, NONE), PAD_NC(GPP_F20, NONE),
/* GPP_F21 : [] ==> GPP_F21_STRAP */ /* GPP_F21 : [] ==> SPI_SOC_CS_UWB_L_STRAP */
PAD_NC(GPP_F21, NONE), PAD_NC(GPP_F21, NONE),
/* GPP_F22 : net NC is not present in the given design */ /* GPP_F22 : net NC is not present in the given design */
PAD_NC(GPP_F22, NONE), PAD_NC(GPP_F22, NONE),
/* GPP_F23 : net NC is not present in the given design */ /* GPP_F23 : net NC is not present in the given design */
PAD_NC(GPP_F23, NONE), PAD_NC(GPP_F23, NONE),
/* GPP_H00 : GPP_H00_STRAP ==> Component NC */ /* GPP_H00 : SPI_SOC_CLK_UWB_STRAP_R ==> Component NC */
PAD_NC(GPP_H00, NONE), PAD_NC(GPP_H00, NONE),
/* GPP_H01 : GPP_H01_STRAP ==> Component NC */ /* GPP_H01 : SPI_SOC_DO_UWB_DI_STRAP_R ==> Component NC */
PAD_NC(GPP_H01, NONE), PAD_NC(GPP_H01, NONE),
/* GPP_H02 : GPP_H02_STRAP ==> Component NC */ /* GPP_H02 : SPI_SOC_DI_UWB_DO_STRAP ==> Component NC */
PAD_NC(GPP_H02, NONE), PAD_NC(GPP_H02, NONE),
/* GPP_H04 : [] ==> WWAN_WLAN_COEX1 */ /* GPP_H04 : [] ==> WWAN_WLAN_COEX1 */
PAD_CFG_NF(GPP_H04, NONE, DEEP, NF2), PAD_CFG_NF(GPP_H04, NONE, DEEP, NF2),
@ -319,13 +319,13 @@ static const struct pad_config gpio_table[] = {
/* GPP_H22 : [] ==> SOC_I2C_TCHSCR_SCL */ /* GPP_H22 : [] ==> SOC_I2C_TCHSCR_SCL */
PAD_CFG_NF(GPP_H22, NONE, DEEP, NF1), PAD_CFG_NF(GPP_H22, NONE, DEEP, NF1),
/* GPP_S00 : [] ==> SDW_HP_CLK */ /* GPP_S00 : [] ==> SDW_HP_CLK_WLAN_PCM_CLK */
PAD_CFG_NF(GPP_S00, NONE, DEEP, NF1), PAD_CFG_NF(GPP_S00, NONE, DEEP, NF1),
/* GPP_S01 : [] ==> SDW_HP_DATA */ /* GPP_S01 : [] ==> SDW_HP_DATA_WLAN_PCM_SYNC */
PAD_CFG_NF(GPP_S01, NONE, DEEP, NF1), PAD_CFG_NF(GPP_S01, NONE, DEEP, NF1),
/* GPP_S02 : [] ==> DMIC_SOC_CLK0_DB_RC */ /* GPP_S02 : [] ==> DMIC_SOC_CLK0_WLAN_PCM_OUT */
PAD_CFG_NF(GPP_S02, NONE, DEEP, NF3), PAD_CFG_NF(GPP_S02, NONE, DEEP, NF3),
/* GPP_S03 : [] ==> DMIC_SOC_DATA0_DB_R */ /* GPP_S03 : [] ==> DMIC_SOC_DATA0_WLAN_PCM_IN */
PAD_CFG_NF(GPP_S03, NONE, DEEP, NF3), PAD_CFG_NF(GPP_S03, NONE, DEEP, NF3),
/* GPP_S04 : [] ==> SDW_SPKR_CLK */ /* GPP_S04 : [] ==> SDW_SPKR_CLK */
PAD_CFG_NF(GPP_S04, NONE, DEEP, NF1), PAD_CFG_NF(GPP_S04, NONE, DEEP, NF1),