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src/northbridge: Improve code formatting 

Change-Id: Iffa058d9eb1e96a4d1587dc3f8a1740907ffbb32
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16414
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Elyes HAOUAS 2016-09-02 19:22:00 +02:00 committed by Martin Roth
parent 6b72787d27
commit 6e8b3c1110
34 changed files with 453 additions and 463 deletions
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2
src/northbridge/amd/agesa/family10/northbridge.c
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@ -162,7 +162,6 @@ static void store_conf_mmio_addr(u32 nodeid, u32 linkn, u32 reg, u32 index,
static void set_io_addr_reg(device_t dev, u32 nodeid, u32 linkn, u32 reg,
u32 io_min, u32 io_max)
{
u32 i;
u32 tempreg;
@ -189,7 +188,6 @@ static void set_io_addr_reg(device_t dev, u32 nodeid, u32 linkn, u32 reg,
static void set_mmio_addr_reg(u32 nodeid, u32 linkn, u32 reg, u32 index, u32 mmio_min, u32 mmio_max, u32 nodes)
{
u32 i;
u32 tempreg;

14
src/northbridge/amd/agesa/family12/northbridge.c
View File

@ -581,18 +581,18 @@ static void domain_set_resources(device_t dev)
if (d.mask & 1) {
basek = ((resource_t)(d.base)) << 8;
limitk = (resource_t)((d.mask << 8) | 0xFFFFFF);
printk(BIOS_DEBUG, "adsr: (before) basek = %llx, limitk = %llx.\n",basek,limitk);
printk(BIOS_DEBUG, "adsr: (before) basek = %llx, limitk = %llx.\n",basek,limitk);
/* Convert these values to multiples of 1K for ease of math. */
basek >>= 10;
limitk >>= 10;
sizek = limitk - basek + 1;
printk(BIOS_DEBUG, "adsr: (after) basek = %llx, limitk = %llx, sizek = %llx.\n",basek,limitk,sizek);
printk(BIOS_DEBUG, "adsr: (after) basek = %llx, limitk = %llx, sizek = %llx.\n",basek,limitk,sizek);
/* see if we need a hole from 0xa0000 to 0xbffff */
if ((basek < 640) && (sizek > 768)) {
printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n");
printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n");
ram_resource(dev, (idx | 0), basek, 640 - basek);
idx += 0x10;
basek = 768;
@ -619,8 +619,7 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n");
}
if ((basek + sizek) <= 4*1024*1024) {
sizek = 0;
}
else {
} else {
basek = 4*1024*1024;
sizek -= (4*1024*1024 - mmio_basek);
}
@ -643,11 +642,10 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n");
#endif
for (link = dev->link_list; link; link = link->next) {
if (link->children) {
if (link->children)
assign_resources(link);
}
}
printk(BIOS_DEBUG, " adsr - leaving this lovely routine.\n");
printk(BIOS_DEBUG, " adsr - leaving this lovely routine.\n");
printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__);
}

5
src/northbridge/amd/amdmct/wrappers/mcti_d.c
View File

@ -492,18 +492,15 @@ static void vErratum372(struct DCTStatStruc *pDCTstat)
static void vErratum414(struct DCTStatStruc *pDCTstat)
{
int dct=0;
for (; dct < 2 ; dct++)
{
for (; dct < 2 ; dct++) {
int dRAMConfigHi = Get_NB32(pDCTstat->dev_dct,0x94 + (0x100 * dct));
int powerDown = dRAMConfigHi & (1 << PowerDownEn );
int ddr3 = dRAMConfigHi & (1 << Ddr3Mode );
int dRAMMRS = Get_NB32(pDCTstat->dev_dct,0x84 + (0x100 * dct));
int pchgPDModeSel = dRAMMRS & (1 << PchgPDModeSel);
if (powerDown && ddr3 && pchgPDModeSel )
{
Set_NB32(pDCTstat->dev_dct,0x84 + (0x100 * dct), dRAMMRS & ~(1 << PchgPDModeSel) );
}
}
}
#endif

3
src/northbridge/intel/e7501/debug.c
View File

@ -146,7 +146,6 @@ static inline void dump_smbus_registers(void)
static inline void dump_io_resources(unsigned port)
{
int i;
printk(BIOS_DEBUG, "%04x:\n", port);
for (i=0;i<256;i++) {
@ -172,5 +171,5 @@ static inline void dump_mem(unsigned start, unsigned end)
printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
}
printk(BIOS_DEBUG, "\n");
}
}
#endif

6
src/northbridge/intel/haswell/northbridge.c
View File

@ -101,8 +101,7 @@ static int get_bar(device_t dev, unsigned int index, u32 *base, u32 *len)
/* There are special BARs that actually are programmed in the MCHBAR. These
* Intel special features, but they do consume resources that need to be
* accounted for. */
static int get_bar_in_mchbar(device_t dev, unsigned int index, u32 *base,
u32 *len)
static int get_bar_in_mchbar(device_t dev, unsigned int index, u32 *base, u32 *len)
{
u32 bar;
@ -198,8 +197,7 @@ struct map_entry {
const char *description;
};
static void read_map_entry(device_t dev, struct map_entry *entry,
uint64_t *result)
static void read_map_entry(device_t dev, struct map_entry *entry, uint64_t *result)
{
uint64_t value;
uint64_t mask;

2
src/northbridge/intel/i945/debug.c
View File

@ -112,4 +112,4 @@ void dump_mem(unsigned start, unsigned end)
printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
}
printk(BIOS_DEBUG, "\n");
}
}