soc/intel/meteorlake: Disable 3-strike error

This patch calls into API to disable 3-strike error on
Meteor Lake SoC based platform.

TEST=Able to build and boot google/rex to ChromeOS.
Dumping MSR 0x1A4 shows BIT11 aka 3-strike error is disabled

```
  localhost ~ # iotools rdmsr 0 0x1a4
  0x0000000000000900
```

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I5c33a1fa2d7e27ec8ffdea876edbb86adc3b45b9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74159
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>

src/soc/intel/meteorlake/cpu.c

@@ -139,6 +139,11 @@ void soc_core_init(struct device *cpu)
 
 	if (CONFIG(INTEL_TME) && is_tme_supported())
 		set_tme_core_activate();
+
+	if (CONFIG(DROP_CPU_FEATURE_PROGRAM_IN_FSP)) {
+		/* Disable 3-strike error */
+		disable_three_strike_error();
+	}
 }
 
 static void per_cpu_smm_trigger(void)