{sb/intel/*/azalia.c,device/azalia_device.c}: Reduce differences
Remaining notable differences at function 'codec_detect(u8 *base)'. Change-Id: Ia64e0ba10f145cf2eae0cb2ff4951b1455963d5d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44370 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
parent
59236d526a
commit
6ea24ffa8f
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@ -19,9 +19,7 @@ static int set_bits(void *port, u32 mask, u32 val)
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reg32 |= val;
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reg32 |= val;
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write32(port, reg32);
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write32(port, reg32);
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/* Wait for readback of register to
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/* Wait for readback of register to match what was just written to it */
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* match what was just written to it
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*/
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count = 50;
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count = 50;
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do {
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do {
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/* Wait 1ms based on BKDG wait time */
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/* Wait 1ms based on BKDG wait time */
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@ -42,10 +40,10 @@ static int codec_detect(u8 *base)
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int count;
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int count;
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/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
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/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
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if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1)
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if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1)
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goto no_codec;
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goto no_codec;
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/* clear STATESTS bits (BAR + 0xE)[2:0] */
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/* clear STATESTS bits (BAR + 0xe)[2:0] */
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reg32 = read32(base + HDA_STATESTS_REG);
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reg32 = read32(base + HDA_STATESTS_REG);
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reg32 |= 7;
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reg32 |= 7;
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write32(base + HDA_STATESTS_REG, reg32);
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write32(base + HDA_STATESTS_REG, reg32);
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@ -68,7 +66,7 @@ static int codec_detect(u8 *base)
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goto no_codec;
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goto no_codec;
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/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
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/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
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if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1)
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if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1)
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goto no_codec;
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goto no_codec;
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/* Read in Codec location (BAR + 0xe)[2..0] */
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/* Read in Codec location (BAR + 0xe)[2..0] */
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@ -108,16 +106,14 @@ static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
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return 0;
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return 0;
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}
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}
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/**
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/*
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* Wait 50usec for the codec to indicate it is ready
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* Wait 50usec for the codec to indicate it is ready.
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* no response would imply that the codec is non-operative
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* No response would imply that the codec is non-operative.
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*/
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*/
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static int wait_for_ready(u8 *base)
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static int wait_for_ready(u8 *base)
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{
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{
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/* Use a 50 usec timeout - the Linux kernel uses the
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/* Use a 50 usec timeout - the Linux kernel uses the same duration */
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* same duration */
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int timeout = 50;
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int timeout = 50;
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while (timeout--) {
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while (timeout--) {
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@ -130,29 +126,29 @@ static int wait_for_ready(u8 *base)
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return -1;
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return -1;
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}
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}
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/**
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/*
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* Wait 50usec for the codec to indicate that it accepted
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* Wait 50usec for the codec to indicate that it accepted the previous command.
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* the previous command. No response would imply that the code
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* No response would imply that the code is non-operative.
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* is non-operative
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*/
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*/
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static int wait_for_valid(u8 *base)
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static int wait_for_valid(u8 *base)
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{
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{
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/* Use a 50 usec timeout - the Linux kernel uses the
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u32 reg32;
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* same duration */
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/* Use a 50 usec timeout - the Linux kernel uses the same duration */
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int timeout = 25;
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int timeout = 25;
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write32(base + HDA_ICII_REG,
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/* Send the verb to the codec */
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HDA_ICII_VALID | HDA_ICII_BUSY);
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reg32 = read32(base + HDA_ICII_REG);
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reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
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write32(base + HDA_ICII_REG, reg32);
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while (timeout--) {
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while (timeout--) {
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udelay(1);
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udelay(1);
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}
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}
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timeout = 50;
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timeout = 50;
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while (timeout--) {
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while (timeout--) {
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u32 reg32 = read32(base + HDA_ICII_REG);
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reg32 = read32(base + HDA_ICII_REG);
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if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) ==
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if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
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HDA_ICII_VALID)
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return 0;
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return 0;
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udelay(1);
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udelay(1);
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}
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}
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@ -170,18 +166,21 @@ static void codec_init(struct device *dev, u8 *base, int addr)
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printk(BIOS_DEBUG, "azalia_audio: Initializing codec #%d\n", addr);
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printk(BIOS_DEBUG, "azalia_audio: Initializing codec #%d\n", addr);
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/* 1 */
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/* 1 */
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if (wait_for_ready(base) == -1)
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if (wait_for_ready(base) == -1) {
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printk(BIOS_DEBUG, " codec not ready.\n");
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return;
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return;
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}
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reg32 = (addr << 28) | 0x000f0000;
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reg32 = (addr << 28) | 0x000f0000;
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write32(base + HDA_IC_REG, reg32);
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write32(base + HDA_IC_REG, reg32);
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if (wait_for_valid(base) == -1)
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if (wait_for_valid(base) == -1) {
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printk(BIOS_DEBUG, " codec not valid.\n");
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return;
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return;
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}
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reg32 = read32(base + HDA_IR_REG);
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/* 2 */
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/* 2 */
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reg32 = read32(base + HDA_IR_REG);
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printk(BIOS_DEBUG, "azalia_audio: codec viddid: %08x\n", reg32);
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printk(BIOS_DEBUG, "azalia_audio: codec viddid: %08x\n", reg32);
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verb_size = find_verb(dev, reg32, &verb);
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verb_size = find_verb(dev, reg32, &verb);
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@ -220,19 +219,18 @@ void azalia_audio_init(struct device *dev)
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struct resource *res;
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struct resource *res;
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u32 codec_mask;
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u32 codec_mask;
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res = find_resource(dev, 0x10);
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (!res)
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if (!res)
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return;
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return;
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// NOTE this will break as soon as the azalia_audio get's a bar above
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// NOTE this will break as soon as the azalia_audio get's a bar above 4G.
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// 4G. Is there anything we can do about it?
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// Is there anything we can do about it?
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base = res2mmio(res, 0, 0);
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base = res2mmio(res, 0, 0);
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printk(BIOS_DEBUG, "azalia_audio: base = %p\n", base);
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printk(BIOS_DEBUG, "azalia_audio: base = %p\n", base);
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codec_mask = codec_detect(base);
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codec_mask = codec_detect(base);
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if (codec_mask) {
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if (codec_mask) {
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printk(BIOS_DEBUG, "azalia_audio: codec_mask = %02x\n",
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printk(BIOS_DEBUG, "azalia_audio: codec_mask = %02x\n", codec_mask);
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codec_mask);
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codecs_init(dev, base, codec_mask);
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codecs_init(dev, base, codec_mask);
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}
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}
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}
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}
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@ -26,9 +26,7 @@ static int set_bits(void *port, u32 mask, u32 val)
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reg32 |= val;
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reg32 |= val;
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write32(port, reg32);
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write32(port, reg32);
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/* Wait for readback of register to
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/* Wait for readback of register to match what was just written to it */
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* match what was just written to it
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*/
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count = 50;
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count = 50;
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do {
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do {
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/* Wait 1ms based on BKDG wait time */
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/* Wait 1ms based on BKDG wait time */
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@ -48,12 +46,11 @@ static int codec_detect(u8 *base)
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u8 reg8;
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u8 reg8;
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/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
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/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
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if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1)
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if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1)
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goto no_codec;
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goto no_codec;
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/* Write back the value once reset bit is set. */
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/* Write back the value once reset bit is set. */
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write16(base + HDA_GCAP_REG,
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write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG));
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read16(base + HDA_GCAP_REG));
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/* Read in Codec location (BAR + 0xe)[2..0] */
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/* Read in Codec location (BAR + 0xe)[2..0] */
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reg8 = read8(base + HDA_STATESTS_REG);
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reg8 = read8(base + HDA_STATESTS_REG);
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@ -89,15 +86,14 @@ static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
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return 0;
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return 0;
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}
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}
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/**
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/*
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* Wait 50usec for the codec to indicate it is ready
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* Wait 50usec for the codec to indicate it is ready.
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* no response would imply that the codec is non-operative
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* No response would imply that the codec is non-operative.
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*/
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*/
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static int wait_for_ready(u8 *base)
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static int wait_for_ready(u8 *base)
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{
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{
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/* Use a 1msec timeout */
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/* Use a 1msec timeout */
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int timeout = 1000;
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int timeout = 1000;
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while (timeout--) {
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while (timeout--) {
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@ -110,28 +106,25 @@ static int wait_for_ready(u8 *base)
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return -1;
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return -1;
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}
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}
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/**
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/*
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* Wait 50usec for the codec to indicate that it accepted
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* Wait 50usec for the codec to indicate that it accepted the previous command.
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* the previous command. No response would imply that the code
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* No response would imply that the code is non-operative.
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* is non-operative
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*/
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*/
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static int wait_for_valid(u8 *base)
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static int wait_for_valid(u8 *base)
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{
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{
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u32 reg32;
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u32 reg32;
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/* Use a 1msec timeout */
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int timeout = 1000;
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/* Send the verb to the codec */
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/* Send the verb to the codec */
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reg32 = read32(base + HDA_ICII_REG);
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reg32 = read32(base + HDA_ICII_REG);
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reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
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reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
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write32(base + HDA_ICII_REG, reg32);
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write32(base + HDA_ICII_REG, reg32);
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/* Use a 1msec timeout */
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int timeout = 1000;
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while (timeout--) {
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while (timeout--) {
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reg32 = read32(base + HDA_ICII_REG);
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reg32 = read32(base + HDA_ICII_REG);
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if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) ==
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if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
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HDA_ICII_VALID)
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return 0;
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return 0;
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udelay(1);
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udelay(1);
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}
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}
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@ -162,9 +155,8 @@ static void codec_init(struct device *dev, u8 *base, int addr)
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return;
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return;
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}
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}
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reg32 = read32(base + HDA_IR_REG);
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/* 2 */
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/* 2 */
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reg32 = read32(base + HDA_IR_REG);
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printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
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printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
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verb_size = find_verb(dev, reg32, &verb);
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verb_size = find_verb(dev, reg32, &verb);
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@ -213,13 +205,12 @@ static void azalia_init(struct device *dev)
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u32 codec_mask;
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u32 codec_mask;
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u32 reg32;
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u32 reg32;
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/* Find base address */
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (!res)
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if (!res)
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return;
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return;
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// NOTE this will break as soon as the Azalia get's a bar above
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// NOTE this will break as soon as the Azalia get's a bar above 4G.
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// 4G. Is there anything we can do about it?
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// Is there anything we can do about it?
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base = res2mmio(res, 0, 0);
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base = res2mmio(res, 0, 0);
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printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base);
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printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base);
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@ -47,7 +47,7 @@ static int codec_detect(u8 *base)
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goto no_codec;
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goto no_codec;
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/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
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/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
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if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1)
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if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1)
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goto no_codec;
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goto no_codec;
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/* Read in Codec location (BAR + 0xe)[2..0] */
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/* Read in Codec location (BAR + 0xe)[2..0] */
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@ -84,9 +84,9 @@ static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
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return 0;
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return 0;
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}
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}
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/**
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/*
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* Wait 50usec for the codec to indicate it is ready
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* Wait 50usec for the codec to indicate it is ready.
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* no response would imply that the codec is non-operative
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* No response would imply that the codec is non-operative.
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*/
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*/
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static int wait_for_ready(u8 *base)
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static int wait_for_ready(u8 *base)
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@ -104,7 +104,7 @@ static int wait_for_ready(u8 *base)
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return -1;
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return -1;
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}
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}
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/**
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/*
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* Wait 50usec for the codec to indicate that it accepted the previous command.
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* Wait 50usec for the codec to indicate that it accepted the previous command.
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* No response would imply that the code is non-operative.
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* No response would imply that the code is non-operative.
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*/
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*/
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@ -112,15 +112,14 @@ static int wait_for_ready(u8 *base)
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static int wait_for_valid(u8 *base)
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static int wait_for_valid(u8 *base)
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{
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{
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u32 reg32;
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u32 reg32;
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/* Use a 50 usec timeout - the Linux kernel uses the same duration */
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int timeout = 50;
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/* Send the verb to the codec */
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/* Send the verb to the codec */
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reg32 = read32(base + HDA_ICII_REG);
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reg32 = read32(base + HDA_ICII_REG);
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reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
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reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
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write32(base + HDA_ICII_REG, reg32);
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write32(base + HDA_ICII_REG, reg32);
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/* Use a 50 usec timeout - the Linux kernel uses the same duration */
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int timeout = 50;
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while (timeout--) {
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while (timeout--) {
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reg32 = read32(base + HDA_ICII_REG);
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reg32 = read32(base + HDA_ICII_REG);
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if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
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if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
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@ -141,18 +140,21 @@ static void codec_init(struct device *dev, u8 *base, int addr)
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printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
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printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
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/* 1 */
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/* 1 */
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if (wait_for_ready(base) == -1)
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if (wait_for_ready(base) == -1) {
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printk(BIOS_DEBUG, " codec not ready.\n");
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return;
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return;
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}
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reg32 = (addr << 28) | 0x000f0000;
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reg32 = (addr << 28) | 0x000f0000;
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write32(base + HDA_IC_REG, reg32);
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write32(base + HDA_IC_REG, reg32);
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if (wait_for_valid(base) == -1)
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if (wait_for_valid(base) == -1) {
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printk(BIOS_DEBUG, " codec not valid.\n");
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return;
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return;
|
||||||
|
}
|
||||||
reg32 = read32(base + HDA_IR_REG);
|
|
||||||
|
|
||||||
/* 2 */
|
/* 2 */
|
||||||
|
reg32 = read32(base + HDA_IR_REG);
|
||||||
printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
|
printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
|
||||||
verb_size = find_verb(dev, reg32, &verb);
|
verb_size = find_verb(dev, reg32, &verb);
|
||||||
|
|
||||||
|
@ -178,6 +180,7 @@ static void codec_init(struct device *dev, u8 *base, int addr)
|
||||||
static void codecs_init(struct device *dev, u8 *base, u32 codec_mask)
|
static void codecs_init(struct device *dev, u8 *base, u32 codec_mask)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
for (i = 2; i >= 0; i--) {
|
for (i = 2; i >= 0; i--) {
|
||||||
if (codec_mask & (1 << i))
|
if (codec_mask & (1 << i))
|
||||||
codec_init(dev, base, i);
|
codec_init(dev, base, i);
|
||||||
|
@ -230,12 +233,12 @@ static void azalia_init(struct device *dev)
|
||||||
// Docking not supported
|
// Docking not supported
|
||||||
pci_and_config8(dev, 0x4d, (u8)~(1 << 7)); // Docking Status
|
pci_and_config8(dev, 0x4d, (u8)~(1 << 7)); // Docking Status
|
||||||
|
|
||||||
res = find_resource(dev, 0x10);
|
res = find_resource(dev, PCI_BASE_ADDRESS_0);
|
||||||
if (!res)
|
if (!res)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
// NOTE this will break as soon as the Azalia get's a bar above
|
// NOTE this will break as soon as the Azalia get's a bar above 4G.
|
||||||
// 4G. Is there anything we can do about it?
|
// Is there anything we can do about it?
|
||||||
base = res2mmio(res, 0, 0);
|
base = res2mmio(res, 0, 0);
|
||||||
printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base);
|
printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base);
|
||||||
codec_mask = codec_detect(base);
|
codec_mask = codec_detect(base);
|
||||||
|
|
|
@ -47,7 +47,7 @@ static int codec_detect(u8 *base)
|
||||||
goto no_codec;
|
goto no_codec;
|
||||||
|
|
||||||
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
|
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
|
||||||
if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1)
|
if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1)
|
||||||
goto no_codec;
|
goto no_codec;
|
||||||
|
|
||||||
/* Read in Codec location (BAR + 0xe)[2..0] */
|
/* Read in Codec location (BAR + 0xe)[2..0] */
|
||||||
|
@ -84,9 +84,9 @@ static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* Wait 50usec for the codec to indicate it is ready
|
* Wait 50usec for the codec to indicate it is ready.
|
||||||
* no response would imply that the codec is non-operative
|
* No response would imply that the codec is non-operative.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
static int wait_for_ready(u8 *base)
|
static int wait_for_ready(u8 *base)
|
||||||
|
@ -104,7 +104,7 @@ static int wait_for_ready(u8 *base)
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* Wait 50usec for the codec to indicate that it accepted the previous command.
|
* Wait 50usec for the codec to indicate that it accepted the previous command.
|
||||||
* No response would imply that the code is non-operative.
|
* No response would imply that the code is non-operative.
|
||||||
*/
|
*/
|
||||||
|
@ -112,15 +112,14 @@ static int wait_for_ready(u8 *base)
|
||||||
static int wait_for_valid(u8 *base)
|
static int wait_for_valid(u8 *base)
|
||||||
{
|
{
|
||||||
u32 reg32;
|
u32 reg32;
|
||||||
|
/* Use a 50 usec timeout - the Linux kernel uses the same duration */
|
||||||
|
int timeout = 50;
|
||||||
|
|
||||||
/* Send the verb to the codec */
|
/* Send the verb to the codec */
|
||||||
reg32 = read32(base + HDA_ICII_REG);
|
reg32 = read32(base + HDA_ICII_REG);
|
||||||
reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
|
reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
|
||||||
write32(base + HDA_ICII_REG, reg32);
|
write32(base + HDA_ICII_REG, reg32);
|
||||||
|
|
||||||
/* Use a 50 usec timeout - the Linux kernel uses the same duration */
|
|
||||||
|
|
||||||
int timeout = 50;
|
|
||||||
while (timeout--) {
|
while (timeout--) {
|
||||||
reg32 = read32(base + HDA_ICII_REG);
|
reg32 = read32(base + HDA_ICII_REG);
|
||||||
if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
|
if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
|
||||||
|
@ -141,18 +140,21 @@ static void codec_init(struct device *dev, u8 *base, int addr)
|
||||||
printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
|
printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
|
||||||
|
|
||||||
/* 1 */
|
/* 1 */
|
||||||
if (wait_for_ready(base) == -1)
|
if (wait_for_ready(base) == -1) {
|
||||||
|
printk(BIOS_DEBUG, " codec not ready.\n");
|
||||||
return;
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
reg32 = (addr << 28) | 0x000f0000;
|
reg32 = (addr << 28) | 0x000f0000;
|
||||||
write32(base + HDA_IC_REG, reg32);
|
write32(base + HDA_IC_REG, reg32);
|
||||||
|
|
||||||
if (wait_for_valid(base) == -1)
|
if (wait_for_valid(base) == -1) {
|
||||||
|
printk(BIOS_DEBUG, " codec not valid.\n");
|
||||||
return;
|
return;
|
||||||
|
}
|
||||||
reg32 = read32(base + HDA_IR_REG);
|
|
||||||
|
|
||||||
/* 2 */
|
/* 2 */
|
||||||
|
reg32 = read32(base + HDA_IR_REG);
|
||||||
printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
|
printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
|
||||||
verb_size = find_verb(dev, reg32, &verb);
|
verb_size = find_verb(dev, reg32, &verb);
|
||||||
|
|
||||||
|
@ -178,6 +180,7 @@ static void codec_init(struct device *dev, u8 *base, int addr)
|
||||||
static void codecs_init(struct device *dev, u8 *base, u32 codec_mask)
|
static void codecs_init(struct device *dev, u8 *base, u32 codec_mask)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
for (i = 2; i >= 0; i--) {
|
for (i = 2; i >= 0; i--) {
|
||||||
if (codec_mask & (1 << i))
|
if (codec_mask & (1 << i))
|
||||||
codec_init(dev, base, i);
|
codec_init(dev, base, i);
|
||||||
|
@ -224,12 +227,12 @@ static void azalia_init(struct device *dev)
|
||||||
/* Lock some R/WO bits by writing their current value. */
|
/* Lock some R/WO bits by writing their current value. */
|
||||||
pci_update_config32(dev, 0x74, ~0, 0);
|
pci_update_config32(dev, 0x74, ~0, 0);
|
||||||
|
|
||||||
res = find_resource(dev, 0x10);
|
res = find_resource(dev, PCI_BASE_ADDRESS_0);
|
||||||
if (!res)
|
if (!res)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
// NOTE this will break as soon as the Azalia get's a bar above
|
// NOTE this will break as soon as the Azalia get's a bar above 4G.
|
||||||
// 4G. Is there anything we can do about it?
|
// Is there anything we can do about it?
|
||||||
base = res2mmio(res, 0, 0);
|
base = res2mmio(res, 0, 0);
|
||||||
printk(BIOS_DEBUG, "Azalia: base = %p\n", base);
|
printk(BIOS_DEBUG, "Azalia: base = %p\n", base);
|
||||||
codec_mask = codec_detect(base);
|
codec_mask = codec_detect(base);
|
||||||
|
|
|
@ -47,7 +47,7 @@ static int codec_detect(u8 *base)
|
||||||
goto no_codec;
|
goto no_codec;
|
||||||
|
|
||||||
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
|
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
|
||||||
if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1)
|
if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1)
|
||||||
goto no_codec;
|
goto no_codec;
|
||||||
|
|
||||||
/* Read in Codec location (BAR + 0xe)[2..0] */
|
/* Read in Codec location (BAR + 0xe)[2..0] */
|
||||||
|
@ -84,9 +84,9 @@ static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* Wait 50usec for the codec to indicate it is ready
|
* Wait 50usec for the codec to indicate it is ready.
|
||||||
* no response would imply that the codec is non-operative
|
* No response would imply that the codec is non-operative.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
static int wait_for_ready(u8 *base)
|
static int wait_for_ready(u8 *base)
|
||||||
|
@ -104,7 +104,7 @@ static int wait_for_ready(u8 *base)
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* Wait 50usec for the codec to indicate that it accepted the previous command.
|
* Wait 50usec for the codec to indicate that it accepted the previous command.
|
||||||
* No response would imply that the code is non-operative.
|
* No response would imply that the code is non-operative.
|
||||||
*/
|
*/
|
||||||
|
@ -112,15 +112,14 @@ static int wait_for_ready(u8 *base)
|
||||||
static int wait_for_valid(u8 *base)
|
static int wait_for_valid(u8 *base)
|
||||||
{
|
{
|
||||||
u32 reg32;
|
u32 reg32;
|
||||||
|
/* Use a 50 usec timeout - the Linux kernel uses the same duration */
|
||||||
|
int timeout = 50;
|
||||||
|
|
||||||
/* Send the verb to the codec */
|
/* Send the verb to the codec */
|
||||||
reg32 = read32(base + HDA_ICII_REG);
|
reg32 = read32(base + HDA_ICII_REG);
|
||||||
reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
|
reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
|
||||||
write32(base + HDA_ICII_REG, reg32);
|
write32(base + HDA_ICII_REG, reg32);
|
||||||
|
|
||||||
/* Use a 50 usec timeout - the Linux kernel uses the same duration */
|
|
||||||
|
|
||||||
int timeout = 50;
|
|
||||||
while (timeout--) {
|
while (timeout--) {
|
||||||
reg32 = read32(base + HDA_ICII_REG);
|
reg32 = read32(base + HDA_ICII_REG);
|
||||||
if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
|
if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
|
||||||
|
@ -141,18 +140,21 @@ static void codec_init(struct device *dev, u8 *base, int addr)
|
||||||
printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
|
printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
|
||||||
|
|
||||||
/* 1 */
|
/* 1 */
|
||||||
if (wait_for_ready(base) == -1)
|
if (wait_for_ready(base) == -1) {
|
||||||
|
printk(BIOS_DEBUG, " codec not ready.\n");
|
||||||
return;
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
reg32 = (addr << 28) | 0x000f0000;
|
reg32 = (addr << 28) | 0x000f0000;
|
||||||
write32(base + HDA_IC_REG, reg32);
|
write32(base + HDA_IC_REG, reg32);
|
||||||
|
|
||||||
if (wait_for_valid(base) == -1)
|
if (wait_for_valid(base) == -1) {
|
||||||
|
printk(BIOS_DEBUG, " codec not valid.\n");
|
||||||
return;
|
return;
|
||||||
|
}
|
||||||
reg32 = read32(base + HDA_IR_REG);
|
|
||||||
|
|
||||||
/* 2 */
|
/* 2 */
|
||||||
|
reg32 = read32(base + HDA_IR_REG);
|
||||||
printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
|
printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
|
||||||
verb_size = find_verb(dev, reg32, &verb);
|
verb_size = find_verb(dev, reg32, &verb);
|
||||||
|
|
||||||
|
@ -178,6 +180,7 @@ static void codec_init(struct device *dev, u8 *base, int addr)
|
||||||
static void codecs_init(struct device *dev, u8 *base, u32 codec_mask)
|
static void codecs_init(struct device *dev, u8 *base, u32 codec_mask)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
for (i = 2; i >= 0; i--) {
|
for (i = 2; i >= 0; i--) {
|
||||||
if (codec_mask & (1 << i))
|
if (codec_mask & (1 << i))
|
||||||
codec_init(dev, base, i);
|
codec_init(dev, base, i);
|
||||||
|
@ -224,12 +227,12 @@ static void azalia_init(struct device *dev)
|
||||||
/* Lock some R/WO bits by writing their current value. */
|
/* Lock some R/WO bits by writing their current value. */
|
||||||
pci_update_config32(dev, 0x74, ~0, 0);
|
pci_update_config32(dev, 0x74, ~0, 0);
|
||||||
|
|
||||||
res = find_resource(dev, 0x10);
|
res = find_resource(dev, PCI_BASE_ADDRESS_0);
|
||||||
if (!res)
|
if (!res)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
// NOTE this will break as soon as the Azalia get's a bar above
|
// NOTE this will break as soon as the Azalia get's a bar above 4G.
|
||||||
// 4G. Is there anything we can do about it?
|
// Is there anything we can do about it?
|
||||||
base = res2mmio(res, 0, 0);
|
base = res2mmio(res, 0, 0);
|
||||||
printk(BIOS_DEBUG, "Azalia: base = %p\n", base);
|
printk(BIOS_DEBUG, "Azalia: base = %p\n", base);
|
||||||
codec_mask = codec_detect(base);
|
codec_mask = codec_detect(base);
|
||||||
|
|
|
@ -22,9 +22,7 @@ static int set_bits(void *port, u32 mask, u32 val)
|
||||||
reg32 |= val;
|
reg32 |= val;
|
||||||
write32(port, reg32);
|
write32(port, reg32);
|
||||||
|
|
||||||
/* Wait for readback of register to
|
/* Wait for readback of register to match what was just written to it */
|
||||||
* match what was just written to it
|
|
||||||
*/
|
|
||||||
count = 50;
|
count = 50;
|
||||||
do {
|
do {
|
||||||
/* Wait 1ms based on BKDG wait time */
|
/* Wait 1ms based on BKDG wait time */
|
||||||
|
@ -44,12 +42,11 @@ static int codec_detect(u8 *base)
|
||||||
u8 reg8;
|
u8 reg8;
|
||||||
|
|
||||||
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
|
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
|
||||||
if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1)
|
if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1)
|
||||||
goto no_codec;
|
goto no_codec;
|
||||||
|
|
||||||
/* Write back the value once reset bit is set. */
|
/* Write back the value once reset bit is set. */
|
||||||
write16(base + HDA_GCAP_REG,
|
write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG));
|
||||||
read16(base + HDA_GCAP_REG));
|
|
||||||
|
|
||||||
/* Read in Codec location (BAR + 0xe)[2..0] */
|
/* Read in Codec location (BAR + 0xe)[2..0] */
|
||||||
reg8 = read8(base + HDA_STATESTS_REG);
|
reg8 = read8(base + HDA_STATESTS_REG);
|
||||||
|
@ -85,15 +82,14 @@ static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* Wait 50usec for the codec to indicate it is ready
|
* Wait 50usec for the codec to indicate it is ready.
|
||||||
* no response would imply that the codec is non-operative
|
* No response would imply that the codec is non-operative.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
static int wait_for_ready(u8 *base)
|
static int wait_for_ready(u8 *base)
|
||||||
{
|
{
|
||||||
/* Use a 1msec timeout */
|
/* Use a 1msec timeout */
|
||||||
|
|
||||||
int timeout = 1000;
|
int timeout = 1000;
|
||||||
|
|
||||||
while (timeout--) {
|
while (timeout--) {
|
||||||
|
@ -106,28 +102,25 @@ static int wait_for_ready(u8 *base)
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* Wait 50usec for the codec to indicate that it accepted
|
* Wait 50usec for the codec to indicate that it accepted the previous command.
|
||||||
* the previous command. No response would imply that the code
|
* No response would imply that the code is non-operative.
|
||||||
* is non-operative
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
static int wait_for_valid(u8 *base)
|
static int wait_for_valid(u8 *base)
|
||||||
{
|
{
|
||||||
u32 reg32;
|
u32 reg32;
|
||||||
|
/* Use a 1msec timeout */
|
||||||
|
int timeout = 1000;
|
||||||
|
|
||||||
/* Send the verb to the codec */
|
/* Send the verb to the codec */
|
||||||
reg32 = read32(base + HDA_ICII_REG);
|
reg32 = read32(base + HDA_ICII_REG);
|
||||||
reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
|
reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
|
||||||
write32(base + HDA_ICII_REG, reg32);
|
write32(base + HDA_ICII_REG, reg32);
|
||||||
|
|
||||||
/* Use a 1msec timeout */
|
|
||||||
|
|
||||||
int timeout = 1000;
|
|
||||||
while (timeout--) {
|
while (timeout--) {
|
||||||
reg32 = read32(base + HDA_ICII_REG);
|
reg32 = read32(base + HDA_ICII_REG);
|
||||||
if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) ==
|
if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
|
||||||
HDA_ICII_VALID)
|
|
||||||
return 0;
|
return 0;
|
||||||
udelay(1);
|
udelay(1);
|
||||||
}
|
}
|
||||||
|
@ -158,9 +151,8 @@ static void codec_init(struct device *dev, u8 *base, int addr)
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
reg32 = read32(base + HDA_IR_REG);
|
|
||||||
|
|
||||||
/* 2 */
|
/* 2 */
|
||||||
|
reg32 = read32(base + HDA_IR_REG);
|
||||||
printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
|
printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
|
||||||
verb_size = find_verb(dev, reg32, &verb);
|
verb_size = find_verb(dev, reg32, &verb);
|
||||||
|
|
||||||
|
@ -186,6 +178,7 @@ static void codec_init(struct device *dev, u8 *base, int addr)
|
||||||
static void codecs_init(struct device *dev, u8 *base, u32 codec_mask)
|
static void codecs_init(struct device *dev, u8 *base, u32 codec_mask)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
for (i = 3; i >= 0; i--) {
|
for (i = 3; i >= 0; i--) {
|
||||||
if (codec_mask & (1 << i))
|
if (codec_mask & (1 << i))
|
||||||
codec_init(dev, base, i);
|
codec_init(dev, base, i);
|
||||||
|
@ -216,8 +209,8 @@ static void azalia_init(struct device *dev)
|
||||||
if (!res)
|
if (!res)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
// NOTE this will break as soon as the Azalia get's a bar above
|
// NOTE this will break as soon as the Azalia get's a bar above 4G.
|
||||||
// 4G. Is there anything we can do about it?
|
// Is there anything we can do about it?
|
||||||
base = res2mmio(res, 0, 0);
|
base = res2mmio(res, 0, 0);
|
||||||
printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base);
|
printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base);
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue