mptable: Refactor lintsrc generation
We copied pretty much the same code for generating mptable entries for local interrupts (with some notable exceptions). This change moves these lines into a generic function "mptable_lintsrc" and makes use of it in many places. The remaining uses of smp_write_lintsrc should be reviewed and replaced by mptable_lintsrc calls where possible, and smp_write_lintsrc made static. This patch was generated using Coccinelle: @@ expression mc; expression isa_bus; @@ -smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x0); -smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x1); +mptable_lintsrc(mc, isa_bus); @@ expression mc; expression isa_bus; @@ -smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, isa_bus, 0x0, MP_APIC_ALL, 0x0); -smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, isa_bus, 0x0, MP_APIC_ALL, 0x1); +mptable_lintsrc(mc, isa_bus); @m@ identifier mc; expression BUS; @@ -#define IO_LOCAL_INT(type, intr, apicid, pin) smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, BUS, (intr), (apicid), (pin)); ... -IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); -IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); +mptable_lintsrc(mc, BUS); Change-Id: I97421f820cd039f5fd753cb0da5c1cca68819bb4 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/244 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
This commit is contained in:
parent
3a1fe9dec1
commit
6eb7a53169
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@ -335,6 +335,12 @@ void smp_write_compatibility_address_space(struct mp_config_table *mc,
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smp_add_mpe_entry(mc, (mpe_t)mpe);
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smp_add_mpe_entry(mc, (mpe_t)mpe);
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}
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}
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void mptable_lintsrc(struct mp_config_table *mc, unsigned long bus_isa)
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{
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smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
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smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
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}
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void mptable_add_isa_interrupts(struct mp_config_table *mc, unsigned long bus_isa, unsigned long apicid, int external_int2)
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void mptable_add_isa_interrupts(struct mp_config_table *mc, unsigned long bus_isa, unsigned long apicid, int external_int2)
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{
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{
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/*I/O Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
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/*I/O Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
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@ -273,6 +273,7 @@ void *smp_write_floating_table_physaddr(unsigned long addr,
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unsigned long mpf_physptr);
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unsigned long mpf_physptr);
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unsigned long write_smp_table(unsigned long addr);
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unsigned long write_smp_table(unsigned long addr);
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void mptable_lintsrc(struct mp_config_table *mc, unsigned long bus_isa);
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void mptable_add_isa_interrupts(struct mp_config_table *mc, unsigned long bus_isa, unsigned long apicid, int external);
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void mptable_add_isa_interrupts(struct mp_config_table *mc, unsigned long bus_isa, unsigned long apicid, int external);
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void mptable_write_buses(struct mp_config_table *mc, int *max_pci_bus, int *isa_bus);
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void mptable_write_buses(struct mp_config_table *mc, int *max_pci_bus, int *isa_bus);
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@ -155,8 +155,7 @@ static void *smp_write_config_table(void *v)
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/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
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/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
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smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
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mptable_lintsrc(mc, bus_isa);
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smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
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/* There is no extension information... */
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/* There is no extension information... */
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/* Compute the checksums */
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/* Compute the checksums */
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@ -179,8 +179,7 @@ static void *smp_write_config_table(void *v)
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/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
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/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
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smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
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mptable_lintsrc(mc, bus_isa);
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smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
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/* There is no extension information... */
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/* There is no extension information... */
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/* Compute the checksums */
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/* Compute the checksums */
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@ -198,10 +198,7 @@ static void *smp_write_config_table(void *v)
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mptable_add_isa_interrupts(mc, bus_isa, apicid_8111, 0);
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mptable_add_isa_interrupts(mc, bus_isa, apicid_8111, 0);
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/* Standard local interrupt assignments */
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/* Standard local interrupt assignments */
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smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
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mptable_lintsrc(mc, bus_isa);
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bus_isa, 0x00, MP_APIC_ALL, 0x00);
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smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
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bus_isa, 0x00, MP_APIC_ALL, 0x01);
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/* PCI Ints: Type Trigger Polarity Bus ID PCIDEVNUM|IRQ APIC ID PIN# */
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/* PCI Ints: Type Trigger Polarity Bus ID PCIDEVNUM|IRQ APIC ID PIN# */
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/* On board nics */
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/* On board nics */
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@ -108,12 +108,7 @@ static void *smp_write_config_table(void *v)
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0x17);
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0x17);
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/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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smp_write_lintsrc(mc, mp_ExtINT,
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mptable_lintsrc(mc, bus_ck804[0]);
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MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT,
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bus_ck804[0], 0x0, MP_APIC_ALL, 0x0);
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smp_write_lintsrc(mc, mp_NMI,
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MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT,
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bus_ck804[0], 0x0, MP_APIC_ALL, 0x1);
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/* There is no extension information... */
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/* There is no extension information... */
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@ -101,8 +101,7 @@ static void *smp_write_config_table(void *v)
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x6, (0x00 << 2) | 3, K8T890_APIC_ID, 0x13);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x6, (0x00 << 2) | 3, K8T890_APIC_ID, 0x13);
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/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
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mptable_lintsrc(mc, bus_isa);
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smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
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/* There is no extension information... */
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/* There is no extension information... */
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/* Compute the checksums. */
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/* Compute the checksums. */
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@ -101,8 +101,7 @@ static void *smp_write_config_table(void *v)
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x6, (0x00 << 2) | 3, K8T890_APIC_ID, 0x13);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x6, (0x00 << 2) | 3, K8T890_APIC_ID, 0x13);
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/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
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mptable_lintsrc(mc, bus_isa);
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smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
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/* There is no extension information... */
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/* There is no extension information... */
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/* Compute the checksums. */
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/* Compute the checksums. */
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@ -91,8 +91,7 @@ static void *smp_write_config_table(void *v)
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}
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}
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/* Local Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
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/* Local Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
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smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
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mptable_lintsrc(mc, bus_isa);
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smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
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/* Compute the checksums. */
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/* Compute the checksums. */
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mc->mpe_checksum =
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mc->mpe_checksum =
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smp_write_intsrc_pci(mc, 7, (9 << 2) | 3, VT8237R_APIC_ID, 0x12);
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smp_write_intsrc_pci(mc, 7, (9 << 2) | 3, VT8237R_APIC_ID, 0x12);
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/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0, 0x0, MP_APIC_ALL, 0x0);
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mptable_lintsrc(mc, 0);
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smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0, 0x0, MP_APIC_ALL, 0x1);
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/* There is no extension information... */
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/* There is no extension information... */
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/* Compute the checksums. */
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/* Compute the checksums. */
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@ -49,8 +49,7 @@ static void *smp_write_config_table(void *v)
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x13, ioapic_id, 0x13); /* UHCI */
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x13, ioapic_id, 0x13); /* UHCI */
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/* Local Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
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/* Local Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
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smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, isa_bus, 0x0, MP_APIC_ALL, 0x0);
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mptable_lintsrc(mc, isa_bus);
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smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, isa_bus, 0x0, MP_APIC_ALL, 0x1);
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/* Compute the checksums. */
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/* Compute the checksums. */
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mc->mpe_checksum =
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mc->mpe_checksum =
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x18, ioapic_id, 0x13);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x18, ioapic_id, 0x13);
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/* Local Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
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/* Local Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
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smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, 0x1, 0x0, MP_APIC_ALL, 0x0);
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mptable_lintsrc(mc, 0x1);
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smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, 0x1, 0x0, MP_APIC_ALL, 0x1);
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/* Compute the checksums. */
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/* Compute the checksums. */
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mc->mpe_checksum =
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mc->mpe_checksum =
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}
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}
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/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
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/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
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smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
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mptable_lintsrc(mc, bus_isa);
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smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
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/* There is no extension information... */
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/* There is no extension information... */
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/* Compute the checksums */
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/* Compute the checksums */
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x0, 0x2, 0x10);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x0, 0x2, 0x10);
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/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x0);
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mptable_lintsrc(mc, isa_bus);
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smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x1);
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/* Compute the checksums */
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/* Compute the checksums */
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mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
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mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
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}
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}
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/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
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/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
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smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
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mptable_lintsrc(mc, bus_isa);
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smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
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/* There is no extension information... */
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/* There is no extension information... */
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/* Compute the checksums */
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/* Compute the checksums */
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}
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}
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/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
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/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
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smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
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mptable_lintsrc(mc, bus_isa);
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smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
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/* There is no extension information... */
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/* There is no extension information... */
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/* Compute the checksums */
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/* Compute the checksums */
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//smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, ( 0x1 <<2)|3, apicid_8131_1, 0x04);
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//smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, ( 0x1 <<2)|3, apicid_8131_1, 0x04);
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/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
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/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
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smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
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mptable_lintsrc(mc, bus_isa);
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smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
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/* There is no extension information... */
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/* There is no extension information... */
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/* Compute the checksums */
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/* Compute the checksums */
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/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
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/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
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printk(BIOS_DEBUG, "bus_isa is: %x\n", bus_isa);
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printk(BIOS_DEBUG, "bus_isa is: %x\n", bus_isa);
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smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
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mptable_lintsrc(mc, bus_isa);
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smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa , 0x0, MP_APIC_ALL, 0x1);
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//extended table entries
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//extended table entries
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smp_write_address_space(mc,0 , ADDRESS_TYPE_IO, 0x0, 0x0, 0x0, 0x0001);
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smp_write_address_space(mc,0 , ADDRESS_TYPE_IO, 0x0, 0x0, 0x0, 0x0001);
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}
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}
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|
|
||||||
/* Local Ints: Type Polarity/Trigger Bus ID IRQ APIC ID PIN# */
|
/* Local Ints: Type Polarity/Trigger Bus ID IRQ APIC ID PIN# */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, isa_bus);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
|
|
||||||
//extended table entries
|
//extended table entries
|
||||||
smp_write_address_space(mc,0 , ADDRESS_TYPE_IO, 0x0, 0x0, 0x0, 0x0001);
|
smp_write_address_space(mc,0 , ADDRESS_TYPE_IO, 0x0, 0x0, 0x0, 0x0001);
|
||||||
|
|
|
@ -119,8 +119,7 @@ static void *smp_write_config_table(void *v)
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x0, ioapic_id, 0x10);
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x0, ioapic_id, 0x10);
|
||||||
|
|
||||||
/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, isa_bus);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
|
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
|
||||||
|
|
|
@ -115,8 +115,7 @@ static void *smp_write_config_table(void *v)
|
||||||
|
|
||||||
/* Standard local interrupt assignments:
|
/* Standard local interrupt assignments:
|
||||||
* Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
* Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_isa, 0x00, MP_APIC_ALL, 0x00);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_isa, 0x00, MP_APIC_ALL, 0x01);
|
|
||||||
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
|
|
|
@ -114,8 +114,7 @@ static void *smp_write_config_table(void *v)
|
||||||
|
|
||||||
/* Standard local interrupt assignments:
|
/* Standard local interrupt assignments:
|
||||||
* Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
* Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_isa, 0x00, MP_APIC_ALL, 0x00);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_isa, 0x00, MP_APIC_ALL, 0x01);
|
|
||||||
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
|
|
|
@ -76,8 +76,7 @@ static void *smp_write_config_table(void *v)
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x0, 0x2, 0x10);
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x0, 0x2, 0x10);
|
||||||
|
|
||||||
/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, isa_bus);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
|
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
|
||||||
|
|
|
@ -126,8 +126,7 @@ static void *smp_write_config_table(void *v)
|
||||||
mptable_add_isa_interrupts(mc, bus_isa, IO_APIC0, 0);
|
mptable_add_isa_interrupts(mc, bus_isa, IO_APIC0, 0);
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_isa, 0, MP_APIC_ALL, 0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_isa, 0, MP_APIC_ALL, 1);
|
|
||||||
|
|
||||||
/* Internal PCI device for i3100 */
|
/* Internal PCI device for i3100 */
|
||||||
|
|
||||||
|
|
|
@ -167,10 +167,7 @@ static void *smp_write_config_table(void *v)
|
||||||
bus_isa, 0x0a, 0x08, 0x10);
|
bus_isa, 0x0a, 0x08, 0x10);
|
||||||
|
|
||||||
/* Standard local interrupt assignments */
|
/* Standard local interrupt assignments */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
|
mptable_lintsrc(mc, bus_isa);
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x00);
|
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
|
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x01);
|
|
||||||
|
|
||||||
/* FIXME verify I have the irqs handled for all of the risers */
|
/* FIXME verify I have the irqs handled for all of the risers */
|
||||||
|
|
||||||
|
|
|
@ -47,10 +47,7 @@ static void *smp_write_config_table(void *v)
|
||||||
mptable_add_isa_interrupts(mc, bus_isa, 0x1, 0);
|
mptable_add_isa_interrupts(mc, bus_isa, 0x1, 0);
|
||||||
|
|
||||||
/* Standard local interrupt assignments */
|
/* Standard local interrupt assignments */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
|
mptable_lintsrc(mc, bus_isa);
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x00);
|
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
|
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x01);
|
|
||||||
|
|
||||||
/* Internal PCI devices */
|
/* Internal PCI devices */
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
|
||||||
|
|
|
@ -75,10 +75,7 @@ static void *smp_write_config_table(void *v)
|
||||||
mptable_add_isa_interrupts(mc, bus_isa, 0x8, 0);
|
mptable_add_isa_interrupts(mc, bus_isa, 0x8, 0);
|
||||||
|
|
||||||
/* Standard local interrupt assignments */
|
/* Standard local interrupt assignments */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
|
mptable_lintsrc(mc, bus_isa);
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x00);
|
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
|
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x01);
|
|
||||||
|
|
||||||
/* IMCH/IICH PCI devices */
|
/* IMCH/IICH PCI devices */
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
|
||||||
|
|
|
@ -61,8 +61,7 @@ static void xe7501devkit_register_interrupts(struct mp_config_table *mc)
|
||||||
{
|
{
|
||||||
// Chipset PCI bus
|
// Chipset PCI bus
|
||||||
// Type Trigger | Polarity Bus ID IRQ APIC ID PIN#
|
// Type Trigger | Polarity Bus ID IRQ APIC ID PIN#
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE |MP_IRQ_POLARITY_HIGH, PCI_BUS_CHIPSET, 0, MP_APIC_ALL, 0);
|
mptable_lintsrc(mc, PCI_BUS_CHIPSET);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE |MP_IRQ_POLARITY_HIGH, PCI_BUS_CHIPSET, 0, MP_APIC_ALL, 1);
|
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, PCI_BUS_CHIPSET, PCI_IRQ(29, INT_A), IOAPIC_ICH3, 16); // USB 1.1 Controller #1
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, PCI_BUS_CHIPSET, PCI_IRQ(29, INT_A), IOAPIC_ICH3, 16); // USB 1.1 Controller #1
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, PCI_BUS_CHIPSET, PCI_IRQ(31, INT_B), IOAPIC_ICH3, 17); // SMBus
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, PCI_BUS_CHIPSET, PCI_IRQ(31, INT_B), IOAPIC_ICH3, 17); // SMBus
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, PCI_BUS_CHIPSET, PCI_IRQ(29, INT_C), IOAPIC_ICH3, 18); // USB 1.1 Controller #3
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, PCI_BUS_CHIPSET, PCI_IRQ(29, INT_C), IOAPIC_ICH3, 18); // USB 1.1 Controller #3
|
||||||
|
|
|
@ -90,8 +90,7 @@ void *smp_write_config_table(void *v)
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x79, 0x1, 0x11);
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x79, 0x1, 0x11);
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x7a, 0x1, 0x12);
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x7a, 0x1, 0x12);
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, isa_bus);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -167,8 +167,7 @@ static void *smp_write_config_table(void *v)
|
||||||
|
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -79,10 +79,7 @@ static void *smp_write_config_table(void *v)
|
||||||
mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
|
mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
|
||||||
|
|
||||||
/* Standard local interrupt assignments */
|
/* Standard local interrupt assignments */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
|
mptable_lintsrc(mc, bus_isa);
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x00);
|
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
|
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x01);
|
|
||||||
|
|
||||||
|
|
||||||
/* PCI Slot 1 */
|
/* PCI Slot 1 */
|
||||||
|
|
|
@ -79,10 +79,7 @@ static void *smp_write_config_table(void *v)
|
||||||
mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
|
mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
|
||||||
|
|
||||||
/* Standard local interrupt assignments */
|
/* Standard local interrupt assignments */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
|
mptable_lintsrc(mc, bus_isa);
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x00);
|
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
|
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x01);
|
|
||||||
|
|
||||||
|
|
||||||
/* PCI Slot 1 */
|
/* PCI Slot 1 */
|
||||||
|
|
|
@ -102,8 +102,7 @@ static void *smp_write_config_table(void *v)
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x0, ioapic_id, 0x10);
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x0, ioapic_id, 0x10);
|
||||||
|
|
||||||
/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, isa_bus);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
|
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
|
||||||
|
|
|
@ -144,12 +144,7 @@ static void *smp_write_config_table(void *v)
|
||||||
PCI_INT(3, 0, 3, 17);
|
PCI_INT(3, 0, 3, 17);
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT,
|
mptable_lintsrc(mc, bus_ck804[0]);
|
||||||
MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT,
|
|
||||||
bus_ck804[0], 0x0, MP_APIC_ALL, 0x0);
|
|
||||||
smp_write_lintsrc(mc, mp_NMI,
|
|
||||||
MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT,
|
|
||||||
bus_ck804[0], 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
|
|
|
@ -94,8 +94,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Local Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
|
/* Local Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
|
|
|
@ -146,8 +146,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -115,8 +115,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -104,8 +104,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -80,10 +80,7 @@ static void *smp_write_config_table(void *v)
|
||||||
mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
|
mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
|
||||||
|
|
||||||
/* Standard local interrupt assignments */
|
/* Standard local interrupt assignments */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
|
mptable_lintsrc(mc, bus_isa);
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x00);
|
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
|
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x01);
|
|
||||||
|
|
||||||
|
|
||||||
/* PCI Slot 1 */
|
/* PCI Slot 1 */
|
||||||
|
|
|
@ -161,8 +161,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -71,8 +71,7 @@ static void *smp_write_config_table(void *v)
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x0, 0x2, 0x10);
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x0, 0x2, 0x10);
|
||||||
|
|
||||||
/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
/* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, isa_bus);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
|
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
|
||||||
|
|
|
@ -65,8 +65,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb600, 0);
|
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb600, 0);
|
||||||
/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
mc->mpe_checksum =
|
mc->mpe_checksum =
|
||||||
|
|
|
@ -182,8 +182,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -117,8 +117,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -118,8 +118,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -104,8 +104,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -102,8 +102,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -116,10 +116,7 @@ static void *smp_write_config_table(void *v)
|
||||||
bus_esb6300_2, 0x08, 0x02, 0x14);
|
bus_esb6300_2, 0x08, 0x02, 0x14);
|
||||||
|
|
||||||
/* Standard local interrupt assignments */
|
/* Standard local interrupt assignments */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
|
mptable_lintsrc(mc, bus_isa);
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x00);
|
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
|
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x01);
|
|
||||||
|
|
||||||
/* FIXME verify I have the irqs handled for all of the risers */
|
/* FIXME verify I have the irqs handled for all of the risers */
|
||||||
|
|
||||||
|
|
|
@ -117,10 +117,7 @@ static void *smp_write_config_table(void *v)
|
||||||
bus_esb6300_2, 0x08, 0x02, 0x14);
|
bus_esb6300_2, 0x08, 0x02, 0x14);
|
||||||
|
|
||||||
/* Standard local interrupt assignments */
|
/* Standard local interrupt assignments */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
|
mptable_lintsrc(mc, bus_isa);
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x00);
|
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
|
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x01);
|
|
||||||
|
|
||||||
/* FIXME verify I have the irqs handled for all of the risers */
|
/* FIXME verify I have the irqs handled for all of the risers */
|
||||||
|
|
||||||
|
|
|
@ -164,10 +164,7 @@ static void *smp_write_config_table(void *v)
|
||||||
(bus_isa - 1), 0x04, 0x02, 0x10);
|
(bus_isa - 1), 0x04, 0x02, 0x10);
|
||||||
|
|
||||||
/* Standard local interrupt assignments */
|
/* Standard local interrupt assignments */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
|
mptable_lintsrc(mc, bus_isa);
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x00);
|
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
|
|
||||||
bus_isa, 0x00, MP_APIC_ALL, 0x01);
|
|
||||||
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
|
|
|
@ -79,8 +79,7 @@ static void *smp_write_config_table(void *v)
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x3, (0x6<<2)|3, 0x9, 0x7);
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x3, (0x6<<2)|3, 0x9, 0x7);
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x0, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, 0x0);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x0, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/*
|
/*
|
||||||
MP Config Extended Table Entries:
|
MP Config Extended Table Entries:
|
||||||
|
|
||||||
|
|
|
@ -148,8 +148,7 @@ static void *smp_write_config_table(void *v)
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|3, apicid_8111, 0x10);
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|3, apicid_8111, 0x10);
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -165,8 +165,7 @@ static void *smp_write_config_table(void *v)
|
||||||
|
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -191,8 +191,7 @@ static void *smp_write_config_table(void *v)
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|3, apicid_8131_2, 0x0);//
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|3, apicid_8131_2, 0x0);//
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -94,8 +94,7 @@ static void *smp_write_config_table(void *v)
|
||||||
|
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -203,8 +203,7 @@ static void *smp_write_config_table(void *v)
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -106,8 +106,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -131,8 +131,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -153,8 +153,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -181,8 +181,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -102,8 +102,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -102,8 +102,7 @@ static void *smp_write_config_table(void *v)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -197,8 +197,7 @@ static void *smp_write_config_table(void *v)
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (1<<2)|3, apicid_8131_2, 0x0);//
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (1<<2)|3, apicid_8131_2, 0x0);//
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -196,8 +196,7 @@ static void *smp_write_config_table(void *v)
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (1<<2)|3, apicid_8131_2, 0x0);//
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (1<<2)|3, apicid_8131_2, 0x0);//
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, bus_isa);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -35,8 +35,7 @@ static void *smp_write_config_table(void *v)
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x48, 0x2, 0x17);
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x48, 0x2, 0x17);
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x3d, 0x2, 0x14);
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x3d, 0x2, 0x14);
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, 0x0, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, 0x0);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, 0x0, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
|
|
|
@ -83,12 +83,7 @@ static void *smp_write_config_table(void *v)
|
||||||
PCI_INT(1, 0, 0, 16);
|
PCI_INT(1, 0, 0, 16);
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
|
||||||
smp_write_lintsrc(mc, mp_ExtINT,
|
mptable_lintsrc(mc, 0);
|
||||||
MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT,
|
|
||||||
0, 0x0, MP_APIC_ALL, 0x0);
|
|
||||||
smp_write_lintsrc(mc, mp_NMI,
|
|
||||||
MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT,
|
|
||||||
0, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
|
|
||||||
/* There is no extension information... */
|
/* There is no extension information... */
|
||||||
|
|
||||||
|
|
|
@ -55,8 +55,7 @@ static void *smp_write_config_table(void *v)
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x2, 0x10, 0x2, 0x11);
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x2, 0x10, 0x2, 0x11);
|
||||||
|
|
||||||
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
||||||
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, 0x0, 0x0, MP_APIC_ALL, 0x0);
|
mptable_lintsrc(mc, 0x0);
|
||||||
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, 0x0, 0x0, MP_APIC_ALL, 0x1);
|
|
||||||
|
|
||||||
/* Compute the checksums */
|
/* Compute the checksums */
|
||||||
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
|
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
|
||||||
|
|
Loading…
Reference in New Issue