mb/pcengines/apu1/mainboard.c: Add SMBIOS type 16 and 17 entries
Use information provided by AGESA to fill the SMBIOS memory tables. Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: Id73de7c2b23c6eb71722f1c78dbf0d246f429c63 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38343 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -87,7 +87,7 @@
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#define BLDOPT_REMOVE_SRAT FALSE
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#define BLDOPT_REMOVE_SRAT FALSE
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#define BLDOPT_REMOVE_SLIT FALSE
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#define BLDOPT_REMOVE_SLIT FALSE
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#define BLDOPT_REMOVE_WHEA FALSE
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#define BLDOPT_REMOVE_WHEA FALSE
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#define BLDOPT_REMOVE_DMI TRUE
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#define BLDOPT_REMOVE_DMI FALSE
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#define BLDOPT_REMOVE_HT_ASSIST TRUE
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#define BLDOPT_REMOVE_HT_ASSIST TRUE
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#define BLDOPT_REMOVE_ATM_MODE TRUE
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#define BLDOPT_REMOVE_ATM_MODE TRUE
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//#define BLDOPT_REMOVE_MSG_BASED_C1E TRUE
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//#define BLDOPT_REMOVE_MSG_BASED_C1E TRUE
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@ -13,6 +13,8 @@
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*/
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*/
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#include <amdblocks/acpimmio.h>
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#include <amdblocks/acpimmio.h>
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#include <AGESA.h>
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#include <AMD.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/device.h>
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#include <device/mmio.h>
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#include <device/mmio.h>
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@ -23,6 +25,7 @@
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#include <string.h>
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#include <string.h>
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#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
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#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
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#include <southbridge/amd/cimx/sb800/pci_devs.h>
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#include <southbridge/amd/cimx/sb800/pci_devs.h>
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#include <northbridge/amd/agesa/agesa_helper.h>
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#include <northbridge/amd/agesa/family14/pci_devs.h>
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#include <northbridge/amd/agesa/family14/pci_devs.h>
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#include <superio/nuvoton/nct5104d/nct5104d.h>
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#include <superio/nuvoton/nct5104d/nct5104d.h>
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#include "gpio_ftns.h"
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#include "gpio_ftns.h"
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@ -173,6 +176,93 @@ static void config_addon_uart(void)
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/**********************************************
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/**********************************************
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* Enable the dedicated functions of the board.
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* Enable the dedicated functions of the board.
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**********************************************/
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**********************************************/
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#if CONFIG(GENERATE_SMBIOS_TABLES)
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static int mainboard_smbios_type16(DMI_INFO *agesa_dmi, int *handle, unsigned long *current)
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{
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struct smbios_type16 *t;
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u32 max_capacity;
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int len;
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t = (struct smbios_type16 *)*current;
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len = sizeof(struct smbios_type16);
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memset(t, 0, len);
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max_capacity = get_spd_offset() ? 4 : 2; /* 4GB or 2GB variant */
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t->type = SMBIOS_PHYS_MEMORY_ARRAY;
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t->handle = *handle;
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t->length = len - 2;
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t->type = SMBIOS_PHYS_MEMORY_ARRAY;
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t->use = MEMORY_ARRAY_USE_SYSTEM;
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t->location = MEMORY_ARRAY_LOCATION_SYSTEM_BOARD;
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t->memory_error_correction = agesa_dmi->T16.MemoryErrorCorrection;
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t->maximum_capacity = max_capacity * 1024 * 1024;
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t->memory_error_information_handle = 0xfffe;
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t->number_of_memory_devices = 1;
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*current += len;
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return len;
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}
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static int mainboard_smbios_type17(DMI_INFO *agesa_dmi, int *handle, unsigned long *current)
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{
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struct smbios_type17 *t;
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int len;
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t = (struct smbios_type17 *)*current;
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memset(t, 0, sizeof(struct smbios_type17));
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t->type = SMBIOS_MEMORY_DEVICE;
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t->length = sizeof(struct smbios_type17) - 2;
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t->handle = *handle + 1;
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t->phys_memory_array_handle = *handle;
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t->memory_error_information_handle = 0xfffe;
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t->total_width = agesa_dmi->T17[0][0][0].TotalWidth;
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t->data_width = agesa_dmi->T17[0][0][0].DataWidth;
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t->size = agesa_dmi->T17[0][0][0].MemorySize;
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/* AGESA DMI returns form factor = 0, override it with SPD value */
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t->form_factor = MEMORY_FORMFACTOR_SODIMM;
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t->device_set = agesa_dmi->T17[0][0][0].DeviceSet;
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t->device_locator = smbios_add_string(t->eos, agesa_dmi->T17[0][0][0].DeviceLocator);
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t->bank_locator = smbios_add_string(t->eos, agesa_dmi->T17[0][0][0].BankLocator);
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t->memory_type = agesa_dmi->T17[0][0][0].MemoryType;
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t->type_detail = *(u16 *)&agesa_dmi->T17[0][0][0].TypeDetail;
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t->speed = agesa_dmi->T17[0][0][0].Speed;
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t->manufacturer = agesa_dmi->T17[0][0][0].ManufacturerIdCode;
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t->serial_number = smbios_add_string(t->eos, agesa_dmi->T17[0][0][0].SerialNumber);
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t->part_number = smbios_add_string(t->eos, agesa_dmi->T17[0][0][0].PartNumber);
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t->attributes = agesa_dmi->T17[0][0][0].Attributes;
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t->extended_size = agesa_dmi->T17[0][0][0].ExtSize;
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t->clock_speed = agesa_dmi->T17[0][0][0].ConfigSpeed;
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t->minimum_voltage = 1500; /* From SPD: 1.5V */
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t->maximum_voltage = 1500;
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len = t->length + smbios_string_table_len(t->eos);
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*current += len;
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return len;
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}
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static int mainboard_smbios_data(struct device *dev, int *handle,
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unsigned long *current)
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{
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DMI_INFO *agesa_dmi;
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int len;
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agesa_dmi = agesawrapper_getlateinitptr(PICK_DMI);
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if (!agesa_dmi)
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return 0;
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len = mainboard_smbios_type16(agesa_dmi, handle, current);
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len += mainboard_smbios_type17(agesa_dmi, handle, current);
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*handle += 2;
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return len;
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}
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#endif
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static void mainboard_enable(struct device *dev)
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static void mainboard_enable(struct device *dev)
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{
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{
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printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
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printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
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@ -194,6 +284,9 @@ static void mainboard_enable(struct device *dev)
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/* Initialize the PIRQ data structures for consumption */
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/* Initialize the PIRQ data structures for consumption */
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pirq_setup();
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pirq_setup();
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#if CONFIG(GENERATE_SMBIOS_TABLES)
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dev->ops->get_smbios_data = mainboard_smbios_data;
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#endif
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}
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}
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/*
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/*
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