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mb/google/brya/variants/volmar: Add firmware config field for FPMCU 

The fingerprint(FP) feature is only for volmar,and it's not for zavala.
Add FPMCU_MASK field in fw_config to disable the FP function for
zavala, and reserve FP function for shipped volmar.
Define the value as following:

	field FPMCU_MASK 10
		option FPMCU_ENABLED		0
		option FPMCU_DISABLED		1
	end

BUG=b:250807253
TEST=build firmware and verify the fp function in volmar DUT.
     write `disable=1` and 'enable=0' in FPCMU_MASK field.
     check the fp function and run `ectool --name cros_fp version`
     It works as expected.

Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
Change-Id: I867771904811459697056662d5e29c545a1a9474
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68917
Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Ren Kuo 2022-10-28 13:01:22 +08:00 committed by Eric Lai
parent 27802bb7b2
commit 6ec48057d0
2 changed files with 11 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/mainboard/google/brya/variants/volmar/overridetree.cb
View File

@ -19,6 +19,10 @@ fw_config
option BOOT_EMMC_DISABLED 0 option BOOT_EMMC_DISABLED 0
option BOOT_EMMC_ENABLED 1 option BOOT_EMMC_ENABLED 1
end end
field FPMCU_MASK 10
option FPMCU_ENABLED 0
option FPMCU_DISABLED 1
end
end end
chip soc/intel/alderlake chip soc/intel/alderlake
register "sagv" = "SaGv_Enabled" register "sagv" = "SaGv_Enabled"
@ -321,7 +325,9 @@ chip soc/intel/alderlake
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
register "enable_delay_ms" = "3" register "enable_delay_ms" = "3"
device spi 0 on end device spi 0 on
probe FPMCU_MASK FPMCU_ENABLED
end
end # FPMCU end # FPMCU
end end
device ref pch_espi on device ref pch_espi on

4
src/mainboard/google/brya/variants/volmar/variant.c
View File

@ -14,4 +14,8 @@ void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
{ {
config->cnvi_bt_audio_offload = fw_config_probe(FW_CONFIG(AUDIO, config->cnvi_bt_audio_offload = fw_config_probe(FW_CONFIG(AUDIO,
MAX98373_NAU88L25B_I2S)); MAX98373_NAU88L25B_I2S));
if (fw_config_probe(FW_CONFIG(FPMCU_MASK, FPMCU_DISABLED)))
config->serial_io_gspi_mode[PchSerialIoIndexGSPI1] = PchSerialIoDisabled;
} }