Check to see if K8 processor is capable of changing FIDVID otherwise it will throw a GP# when reading FIDVID_STATUS
Signed-off-by: Dan Lykowski <lykowdk@gmail.com> Acked-by: Zheng Bao <zheng.bao@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -161,6 +161,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
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int needs_reset = 0;
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u32 bsp_apicid = 0;
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msr_t msr;
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struct cpuid_result cpuid1;
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struct sys_info *sysinfo = (struct sys_info *)(DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE);
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@ -197,16 +198,26 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
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rs690_early_setup();
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sb600_early_setup();
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msr=rdmsr(0xc0010042);
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printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
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/* Check to see if processor is capable of changing FIDVID */
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/* otherwise it will throw a GP# when reading FIDVID_STATUS */
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cpuid1 = cpuid(0x80000007);
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if( (cpuid1.edx & 0x6) == 0x6 ) {
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enable_fid_change();
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enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
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init_fidvid_bsp(bsp_apicid);
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/* Read FIDVID_STATUS */
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msr=rdmsr(0xc0010042);
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printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
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/* show final fid and vid */
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msr=rdmsr(0xc0010042);
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printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
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enable_fid_change();
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enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
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init_fidvid_bsp(bsp_apicid);
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/* show final fid and vid */
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msr=rdmsr(0xc0010042);
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printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
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} else {
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printk_debug("Changing FIDVID not supported\n");
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}
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needs_reset = optimize_link_coherent_ht();
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needs_reset |= optimize_link_incoherent_ht(sysinfo);
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@ -155,6 +155,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
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int needs_reset = 0;
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u32 bsp_apicid = 0;
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msr_t msr;
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struct cpuid_result cpuid1;
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struct sys_info *sysinfo =
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(struct sys_info *)(DCACHE_RAM_BASE + DCACHE_RAM_SIZE -
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DCACHE_RAM_GLOBAL_VAR_SIZE);
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@ -198,16 +199,26 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
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post_code(0x04);
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msr = rdmsr(0xc0010042);
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printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
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/* Check to see if processor is capable of changing FIDVID */
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/* otherwise it will throw a GP# when reading FIDVID_STATUS */
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cpuid1 = cpuid(0x80000007);
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if( (cpuid1.edx & 0x6) == 0x6 ) {
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enable_fid_change();
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enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
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init_fidvid_bsp(bsp_apicid);
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/* Read FIDVID_STATUS */
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msr=rdmsr(0xc0010042);
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printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
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// show final fid and vid
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msr = rdmsr(0xc0010042);
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printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
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enable_fid_change();
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enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
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init_fidvid_bsp(bsp_apicid);
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/* show final fid and vid */
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msr=rdmsr(0xc0010042);
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printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
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} else {
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printk_debug("Changing FIDVID not supported\n");
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}
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post_code(0x05);
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@ -259,6 +259,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
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int needs_reset; int i;
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unsigned bsp_apicid = 0;
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struct cpuid_result cpuid1;
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if (bist == 0) {
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bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
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@ -311,8 +312,13 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
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#endif
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#if K8_SET_FIDVID == 1
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/* Check to see if processor is capable of changing FIDVID */
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/* otherwise it will throw a GP# when reading FIDVID_STATUS */
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cpuid1 = cpuid(0x80000007);
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if( (cpuid1.edx & 0x6) == 0x6 ) {
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{
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/* Read FIDVID_STATUS */
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msr_t msr;
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msr=rdmsr(0xc0010042);
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print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n");
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@ -332,6 +338,11 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
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print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n");
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}
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} else {
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print_debug("Changing FIDVID not supported\n");
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}
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#endif
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#if 1
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