diff --git a/src/southbridge/amd/amd8111/lpc.c b/src/southbridge/amd/amd8111/lpc.c
index df3eff4f51..8841760c02 100644
--- a/src/southbridge/amd/amd8111/lpc.c
+++ b/src/southbridge/amd/amd8111/lpc.c
@@ -26,7 +26,7 @@ static void enable_hpet(struct device *dev)
 {
 	unsigned long hpet_address;
 
-	pci_write_config32(dev,0xa0, 0xfed00001);
+	pci_write_config32(dev, 0xa0, CONFIG_HPET_ADDRESS|1);
 	hpet_address = pci_read_config32(dev,0xa0)& 0xfffffffe;
 	printk(BIOS_DEBUG, "enabling HPET @0x%lx\n", hpet_address);
 
diff --git a/src/southbridge/nvidia/ck804/lpc.c b/src/southbridge/nvidia/ck804/lpc.c
index d0f687f16b..be8a39c258 100644
--- a/src/southbridge/nvidia/ck804/lpc.c
+++ b/src/southbridge/nvidia/ck804/lpc.c
@@ -207,7 +207,7 @@ static void ck804_lpc_read_resources(device_t dev)
 
 		res = find_resource(dev, 0x44); /* HPET */
 		if (res) {
-			res->base = 0xfed00000;
+			res->base = CONFIG_HPET_ADDRESS;
 			res->flags |= IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 		}
 	}
diff --git a/src/southbridge/nvidia/mcp55/lpc.c b/src/southbridge/nvidia/mcp55/lpc.c
index 8d1a83a244..5726c76293 100644
--- a/src/southbridge/nvidia/mcp55/lpc.c
+++ b/src/southbridge/nvidia/mcp55/lpc.c
@@ -83,7 +83,7 @@ static void enable_hpet(struct device *dev)
 {
 	unsigned long hpet_address;
 
-	pci_write_config32(dev, 0x44, 0xfed00001);
+	pci_write_config32(dev, 0x44, CONFIG_HPET_ADDRESS|1);
 	hpet_address=pci_read_config32(dev, 0x44) & 0xfffffffe;
 	printk(BIOS_DEBUG, "enabling HPET @0x%lx\n", hpet_address);
 }