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soc/intel/icl: enable common CPU code 

Enable CPU_INTEL_COMMON to make common CPU code available to CNL, which
gets used in CB:45535 and CB:45536 for CPPC entries generation.

Note: This also retrieves the VMX Kconfig and enables it by default,
like done for SKL and CNL already.

Since FSP always set the feature config lock, SET_IA32_FC_LOCK_BIT gets
selected statically by the SoC to reflect this in menuconfig.

Change-Id: I58e86021687fc0a836324f70071f7ea80242b3cb
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45826
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Michael Niewöhner 2020-09-29 17:26:58 +02:00 committed by Patrick Georgi
parent a64b4f4548
commit 6f1754d090
1 changed files with 2 additions and 0 deletions
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src/soc/intel/icelake/Kconfig
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@ -11,6 +11,8 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_ALL_STAGES_X86_32 select ARCH_ALL_STAGES_X86_32
select BOOT_DEVICE_SUPPORTS_WRITES select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS select CACHE_MRC_SETTINGS
select CPU_INTEL_COMMON
select SET_IA32_FC_LOCK_BIT
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select CPU_SUPPORTS_PM_TIMER_EMULATION select CPU_SUPPORTS_PM_TIMER_EMULATION
select FSP_M_XIP select FSP_M_XIP