diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
index 37bb8f23c2..2529e53feb 100644
--- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
@@ -73,6 +73,17 @@ chip soc/intel/tigerlake
 	# Enable EMMC HS400 mode
 	register "ScsEmmcHs400Enabled" = "1"
 
+	# Display related UPDs
+	# Select eDP for port A
+	register "DdiPortAConfig" = "1"
+
+	# Enable HPD for DDI ports B/C
+	register "DdiPortBHpd" = "1"
+	register "DdiPortCHpd" = "1"
+	# Enable DDC for DDI ports B/C
+	register "DdiPortBDdc" = "1"
+	register "DdiPortCDdc" = "1"
+
 	# Intel Common SoC Config
 	#+-------------------+---------------------------+
 	#| Field             |  Value                    |
@@ -111,7 +122,7 @@ chip soc/intel/tigerlake
 
 	device domain 0 on
 		device pci 00.0 on end # Host Bridge
-		device pci 02.0 off end # Integrated Graphics Device
+		device pci 02.0 on end # Integrated Graphics Device
 		device pci 04.0 off end # SA Thermal device
 		device pci 05.0 off end # IPU
 		device pci 09.0 off end # Intel Trace Hub
diff --git a/src/mainboard/google/dedede/variants/baseboard/gpio.c b/src/mainboard/google/dedede/variants/baseboard/gpio.c
index fa975e796b..b8ceae2f8c 100644
--- a/src/mainboard/google/dedede/variants/baseboard/gpio.c
+++ b/src/mainboard/google/dedede/variants/baseboard/gpio.c
@@ -27,6 +27,8 @@ static const struct pad_config gpio_table[] = {
 	PAD_NC(GPP_A13, NONE),
 	/* A14 : USB_OC3_N */
 	PAD_NC(GPP_A14, NONE),
+	/* A16 : EC_AP_USB_C0_HPD */
+	PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1),
 	/* A18 : USB_OC0_N */
 	PAD_NC(GPP_A18, NONE),
 
@@ -40,6 +42,8 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_NF(GPP_B17, NONE, DEEP, NF1),
 	/* B18 : H1_SLAVE_SPI_MOSI_R */
 	PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1),
+	/* B23 : EC_AP_USB_C1_HDMI_HPD */
+	PAD_CFG_NF(GPP_B23, NONE, DEEP, NF1),
 
 	/* C16 : AP_I2C_TRACKPAD_SDA_3V3 */
 	PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),