GNUBoot/coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

mb/amd/mandolin: Add decode range for LPC debug card

Browse source 
Some LPC debug boards hard strap SIO address to be at
0x164e/0x164d vs 0x4e/0x4d. Add support for configurable
SIO address to support these cards.

BUG=b:159933344
TEST=boot with LPC debug card, verify serial output

Change-Id: I103c61f21f13970dfa3b9a788b29964e478fb84c
Signed-off-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47545
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Nikolai Vyssotski 2020-11-11 16:23:25 -06:00 committed by Patrick Georgi
parent eb8036b591
commit 6f32d80e18
2 changed files with 25 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

18
src/mainboard/amd/mandolin/Kconfig
View file

@ -29,6 +29,24 @@ config AMD_LPC_DEBUG_CARD
PICASSO_CONSOLE_UART which selects the SoC's integrated memory-mapped PICASSO_CONSOLE_UART which selects the SoC's integrated memory-mapped
UART for coreboot console output. UART for coreboot console output.
choice
prompt "SMSC/Microchip 1036 SuperIO config address"
depends on SUPERIO_SMSC_SIO1036
default SMSC_SIO1036_BASE_164E
config SMSC_SIO1036_BASE_4E
bool "0x4e/0x4d base address"
config SMSC_SIO1036_BASE_164E
bool "0x164e/0x164d base address"
endchoice
config SUPERIO_ADDR_BASE
hex
default 0x4e if SMSC_SIO1036_BASE_4E
default 0x164e if SMSC_SIO1036_BASE_164E
config CBFS_SIZE config CBFS_SIZE
hex hex
default 0x7cf000 if BOARD_AMD_MANDOLIN # Maximum size for the Mandolin FMAP default 0x7cf000 if BOARD_AMD_MANDOLIN # Maximum size for the Mandolin FMAP

9
src/mainboard/amd/mandolin/bootblock.c
View file

@ -5,14 +5,19 @@
#include <superio/smsc/sio1036/sio1036.h> #include <superio/smsc/sio1036/sio1036.h>
#include "gpio.h" #include "gpio.h"
#define SERIAL_DEV PNP_DEV(0x4e, SIO1036_SP1) #define SERIAL_DEV PNP_DEV(CONFIG_SUPERIO_ADDR_BASE, SIO1036_SP1)
void bootblock_mainboard_early_init(void) void bootblock_mainboard_early_init(void)
{ {
mainboard_program_early_gpios(); mainboard_program_early_gpios();
if (CONFIG(SUPERIO_SMSC_SIO1036)) { if (CONFIG(SUPERIO_SMSC_SIO1036)) {
lpc_enable_sio_decode(LPC_SELECT_SIO_4E4F); if (CONFIG_SUPERIO_ADDR_BASE == 0x4e) {
lpc_enable_sio_decode(LPC_SELECT_SIO_4E4F);
} else {
// set up 16 byte wide I/O range window for the super IO
lpc_set_wideio_range(CONFIG_SUPERIO_ADDR_BASE & ~0xF, 16);
}
lpc_enable_decode(DECODE_ENABLE_SERIAL_PORT0 << CONFIG_UART_FOR_CONSOLE); lpc_enable_decode(DECODE_ENABLE_SERIAL_PORT0 << CONFIG_UART_FOR_CONSOLE);
sio1036_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); sio1036_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
} }