soc/amd/*/include/soc/iomap.h: rework HPET base address check

The AMD SoCs had a check to make sure that HPET_ADDRESS_OVERRIDE isn't
set so that the HPET_ADDRESS Kconfig option will have the right default
value. Instead check if the HPET_ADDRESS Kconfig value matches the
HPET_BASE_ADDRESS define in the SoC code which is the case if
HPET_ADDRESS_OVERRIDE isn't selected.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Icf1832eb36c031e93ba24f342e9a8a7bf13faecc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62275
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2022-02-22 23:00:18 +01:00
parent 47722cfe55
commit 6f413d1c3f
4 changed files with 12 additions and 12 deletions

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@ -15,10 +15,10 @@
#define GNB_IO_APIC_ADDR 0xfec01000 #define GNB_IO_APIC_ADDR 0xfec01000
#define SPI_BASE_ADDRESS 0xfec10000 #define SPI_BASE_ADDRESS 0xfec10000
#if CONFIG(HPET_ADDRESS_OVERRIDE)
#error HPET address override is not allowed and must be fixed at 0xfed00000
#endif
#define HPET_BASE_ADDRESS 0xfed00000 #define HPET_BASE_ADDRESS 0xfed00000
#if CONFIG_HPET_ADDRESS != HPET_BASE_ADDRESS
#error HPET address must be 0xfed00000
#endif
/* FCH AL2AHB Registers */ /* FCH AL2AHB Registers */
#define ALINK_AHB_ADDRESS 0xfedc0000 #define ALINK_AHB_ADDRESS 0xfedc0000

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@ -10,10 +10,10 @@
#define GNB_IO_APIC_ADDR 0xfec01000 #define GNB_IO_APIC_ADDR 0xfec01000
#define SPI_BASE_ADDRESS 0xfec10000 #define SPI_BASE_ADDRESS 0xfec10000
#if CONFIG(HPET_ADDRESS_OVERRIDE)
#error HPET address override is not allowed and must be fixed at 0xfed00000
#endif
#define HPET_BASE_ADDRESS 0xfed00000 #define HPET_BASE_ADDRESS 0xfed00000
#if CONFIG_HPET_ADDRESS != HPET_BASE_ADDRESS
#error HPET address must be 0xfed00000
#endif
/* FCH AL2AHB Registers */ /* FCH AL2AHB Registers */
#define ALINK_AHB_ADDRESS 0xfedc0000 #define ALINK_AHB_ADDRESS 0xfedc0000

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@ -15,10 +15,10 @@
#define GNB_IO_APIC_ADDR 0xfec01000 #define GNB_IO_APIC_ADDR 0xfec01000
#define SPI_BASE_ADDRESS 0xfec10000 #define SPI_BASE_ADDRESS 0xfec10000
#if CONFIG(HPET_ADDRESS_OVERRIDE)
#error HPET address override is not allowed and must be fixed at 0xfed00000
#endif
#define HPET_BASE_ADDRESS 0xfed00000 #define HPET_BASE_ADDRESS 0xfed00000
#if CONFIG_HPET_ADDRESS != HPET_BASE_ADDRESS
#error HPET address must be 0xfed00000
#endif
/* FCH AL2AHB Registers */ /* FCH AL2AHB Registers */
#define ALINK_AHB_ADDRESS 0xfedc0000 #define ALINK_AHB_ADDRESS 0xfedc0000

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@ -16,10 +16,10 @@
#define APU_I2C2_BASE 0xfedc4000 #define APU_I2C2_BASE 0xfedc4000
#define APU_I2C3_BASE 0xfedc5000 #define APU_I2C3_BASE 0xfedc5000
#if CONFIG(HPET_ADDRESS_OVERRIDE)
#error HPET address override is not allowed and must be fixed at 0xfed00000
#endif
#define HPET_BASE_ADDRESS 0xfed00000 #define HPET_BASE_ADDRESS 0xfed00000
#if CONFIG_HPET_ADDRESS != HPET_BASE_ADDRESS
#error HPET address must be 0xfed00000
#endif
#define APU_UART0_BASE 0xfedc6000 #define APU_UART0_BASE 0xfedc6000
#define APU_UART1_BASE 0xfedc8000 #define APU_UART1_BASE 0xfedc8000