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mb/google/rex/var/ovis: Add DPTF configuration 

Configure PL1 and PL2 are configured for powerformance.
Based on values from Intel Meteor Lake UH Power Map document ID:640982

BUG=b:286834207
TEST=Build and boot google/ovis and check ACPI SSDT for DPTF entries

Change-Id: Ia40884b3abd1417dea6ad291de4845762ee01966
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77623
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jakub Czapiga 2023-08-31 17:29:16 +00:00 committed by Felix Held
parent 87d8b8cff0
commit 6f4a9497ae
1 changed files with 67 additions and 0 deletions
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67
src/mainboard/google/rex/variants/ovis/overridetree.cb
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@ -53,6 +53,73 @@ chip soc/intel/meteorlake
device domain 0 on device domain 0 on
device ref dtt on device ref dtt on
chip drivers/intel/dptf chip drivers/intel/dptf
## sensor information
register "options.tsr[0].desc" = ""DDR_SOC""
register "options.tsr[1].desc" = ""Ambient""
## Active Policy
# FIXME: below values are initial reference values only
register "policies.active" = "{
[0] = {
.target = DPTF_TEMP_SENSOR_0,
.thresholds = {
TEMP_PCT(75, 90),
TEMP_PCT(70, 80),
TEMP_PCT(65, 70),
TEMP_PCT(60, 60),
TEMP_PCT(55, 50),
TEMP_PCT(50, 40),
TEMP_PCT(45, 30),
}
},
[1] = {
.target = DPTF_TEMP_SENSOR_1,
.thresholds = {
TEMP_PCT(75, 90),
TEMP_PCT(70, 80),
TEMP_PCT(65, 70),
TEMP_PCT(60, 60),
TEMP_PCT(55, 50),
TEMP_PCT(50, 40),
TEMP_PCT(45, 30),
}
},
}"
## Passive Policy
# TODO: below values are initial reference values only
register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 5000),
[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 80, 5000),
}"
## Critical Policy
# TODO: below values are initial reference values only
register "policies.critical" = "{
[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
}"
## Power Limits Control
register "controls.power_limits" = "{
.pl1 = {
.min_power = 28000,
.max_power = 28000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 32 * MSECS_PER_SEC,
.granularity = 200,
},
.pl2 = {
.min_power = 64000,
.max_power = 64000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 32 * MSECS_PER_SEC,
.granularity = 1000,
}
}"
device generic 0 alias dptf_policy on end device generic 0 alias dptf_policy on end
end end
end end