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mb/hp/280_g2: Restore comments documenting root port devices 

While transitioning the devicetree to make use of the chipset
devicetree, commit 3b5b9f4c54 ("mb/hp/280_g2: Make use of the chipset
devicetree") removed useful comments documenting the endpoints of the
root ports. Restore them.

Change-Id: I178cb472a8f40baaccc30514689bda2730dfa9dc
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79153
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Felix Singer 2023-11-20 21:17:00 +01:00 committed by Felix Singer
parent 8956458bdc
commit 6f74bc6028
1 changed files with 4 additions and 0 deletions
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4
src/mainboard/hp/280_g2/devicetree.cb
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@ -64,12 +64,14 @@ chip soc/intel/skylake
end
device ref uart2 on end
device ref pcie_rp5 on
# IT8893E PCI Bridge
register "PcieRpEnable[4]" = "1"
register "PcieRpLtrEnable[4]" = "1"
register "PcieRpAdvancedErrorReporting[4]" = "1"
register "PcieRpClkSrcNumber[4]" = "11"
end
device ref pcie_rp6 on
# PCIe x1 slot
register "PcieRpEnable[5]" = "1"
register "PcieRpHotPlug[5]" = "1"
register "PcieRpLtrEnable[5]" = "1"
@ -77,12 +79,14 @@ chip soc/intel/skylake
register "PcieRpClkSrcNumber[5]" = "6"
end
device ref pcie_rp7 on
# RTL8111 GbE NIC
register "PcieRpEnable[6]" = "1"
register "PcieRpLtrEnable[6]" = "1"
register "PcieRpAdvancedErrorReporting[6]" = "1"
register "PcieRpClkSrcNumber[6]" = "10"
end
device ref pcie_rp8 on
# M.2 2230 slot
register "PcieRpEnable[7]" = "1"
register "PcieRpHotPlug[7]" = "1"
register "PcieRpLtrEnable[7]" = "1"