mb/hp/280_g2: Restore comments documenting root port devices
While transitioning the devicetree to make use of the chipset
devicetree, commit 3b5b9f4c54
("mb/hp/280_g2: Make use of the chipset
devicetree") removed useful comments documenting the endpoints of the
root ports. Restore them.
Change-Id: I178cb472a8f40baaccc30514689bda2730dfa9dc
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79153
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
parent
8956458bdc
commit
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@ -64,12 +64,14 @@ chip soc/intel/skylake
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end
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end
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device ref uart2 on end
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device ref uart2 on end
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device ref pcie_rp5 on
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device ref pcie_rp5 on
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# IT8893E PCI Bridge
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register "PcieRpEnable[4]" = "1"
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register "PcieRpEnable[4]" = "1"
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register "PcieRpLtrEnable[4]" = "1"
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register "PcieRpLtrEnable[4]" = "1"
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register "PcieRpAdvancedErrorReporting[4]" = "1"
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register "PcieRpAdvancedErrorReporting[4]" = "1"
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register "PcieRpClkSrcNumber[4]" = "11"
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register "PcieRpClkSrcNumber[4]" = "11"
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end
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end
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device ref pcie_rp6 on
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device ref pcie_rp6 on
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# PCIe x1 slot
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register "PcieRpEnable[5]" = "1"
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register "PcieRpEnable[5]" = "1"
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register "PcieRpHotPlug[5]" = "1"
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register "PcieRpHotPlug[5]" = "1"
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register "PcieRpLtrEnable[5]" = "1"
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register "PcieRpLtrEnable[5]" = "1"
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@ -77,12 +79,14 @@ chip soc/intel/skylake
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register "PcieRpClkSrcNumber[5]" = "6"
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register "PcieRpClkSrcNumber[5]" = "6"
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end
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end
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device ref pcie_rp7 on
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device ref pcie_rp7 on
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# RTL8111 GbE NIC
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register "PcieRpEnable[6]" = "1"
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register "PcieRpEnable[6]" = "1"
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register "PcieRpLtrEnable[6]" = "1"
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register "PcieRpLtrEnable[6]" = "1"
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register "PcieRpAdvancedErrorReporting[6]" = "1"
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register "PcieRpAdvancedErrorReporting[6]" = "1"
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register "PcieRpClkSrcNumber[6]" = "10"
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register "PcieRpClkSrcNumber[6]" = "10"
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end
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end
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device ref pcie_rp8 on
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device ref pcie_rp8 on
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# M.2 2230 slot
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register "PcieRpEnable[7]" = "1"
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register "PcieRpEnable[7]" = "1"
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register "PcieRpHotPlug[7]" = "1"
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register "PcieRpHotPlug[7]" = "1"
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register "PcieRpLtrEnable[7]" = "1"
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register "PcieRpLtrEnable[7]" = "1"
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