GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Supermicro X7DB8: Use autogeneration of mptable 

And fix the wrong indenting of devicetree.cb while at it.

Change-Id: Idbb19fb5d7155f44675098e79920caf65191c239
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1222
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Sven Schnelle 2012-06-25 21:35:45 +02:00 committed by Patrick Georgi
parent 246e84bc0d
commit 6fa1d3a218
2 changed files with 117 additions and 72 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/supermicro/x7db8/Kconfig
View File

@ -12,6 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_MP_TABLE
select HAVE_PIRQ_TABLE
select DRIVERS_I2C_W83793
select DRIVERS_GENERIC_IOAPIC
config MAINBOARD_DIR
string

84
src/mainboard/supermicro/x7db8/devicetree.cb
View File

@ -33,20 +33,28 @@ chip northbridge/intel/i5000
subsystemid 0x15d9 0x2017
end
device pci 02.0 on # PCIe bridge
device pci 00.0 on
device pci 00.0 on
device pci 00.0 on end
device pci 02.0 on end
device pci 02.0 on # PCI Express x8 Port 2-3
ioapic_irq 8 INTA 0x10
ioapic_irq 8 INTB 0x11
ioapic_irq 8 INTC 0x12
ioapic_irq 8 INTD 0x13
device pci 00.0 on # PCI Express Upstream Port
device pci 00.0 on # PCI Express Downstream Port E1
device pci 00.0 on # 6700PXH PCI Express-to-PCI Bridge A
ioapic_irq 8 INTA 0x11
ioapic_irq 8 INTB 0x10
ioapic_irq 8 INTC 0x11
ioapic_irq 8 INTD 0x10
# PCI slot
device pci 00.2 on # 6700PXH PCI Express-to-PCI Bridge B
# PCI slot
end
device pci 02.0 on
device pci 00.0 on
device pci 02.0 on
device pci 00.0 on end # e1000 #1
device pci 00.1 on end # e1000 #2
device pci 02.0 on # Adaptec U320 #1
ioapic_irq 8 INTA 0x10
end
device pci 02.1 on # Adaptec U320 #2
ioapic_irq 8 INTB 0x11
end
device pci 00.1 on end
end
end
device pci 00.1 on end
@ -58,6 +66,31 @@ chip northbridge/intel/i5000
device pci 05.0 on end
device pci 06.0 on end
device pci 07.0 on end
device pci 00.3 on # PCI Express to PCI-X Bridge
ioapic_irq 9 INTA 3
ioapic_irq 9 INTB 0
ioapic_irq 9 INTC 1
ioapic_irq 9 INTD 2
# PCI-X Slot
end
end
device pci 03.0 on
ioapic_irq 8 INTA 0x10
end
device pci 04.0 on
ioapic_irq 8 INTA 0x10
end
device pci 05.0 on
ioapic_irq 8 INTA 0x10
end
device pci 06.0 on
ioapic_irq 8 INTA 0x10
end
device pci 07.0 on
ioapic_irq 8 INTA 0x10
end
device pci 10.0 on end # FBD
device pci 10.1 on end # FBD
device pci 10.2 on end # FBD
@ -71,18 +104,31 @@ chip northbridge/intel/i5000
register "pirq_e_h" = "0x80808080"
register "sata_ports_implemented" = "0x3f"
device pci 1c.0 on end # PCIe bridge
device pci 1d.0 on end # USB UHCI
device pci 1d.1 on end # USB UHCI
device pci 1d.2 on end # USB UHCI
device pci 1d.3 on end # USB UHCI
device pci 1c.0 on
ioapic_irq 8 INTA 0x14
ioapic_irq 8 INTB 0x15
ioapic_irq 8 INTC 0x16
ioapic_irq 8 INTD 0x17
end # PCIe bridge
device pci 1d.0 on
ioapic_irq 8 INTA 0x10
end # USB UHCI
device pci 1d.1 on
ioapic_irq 8 INTB 0x11
end # USB UHCI
device pci 1d.2 on
ioapic_irq 8 INTC 0x12
end # USB UHCI
device pci 1d.3 on
ioapic_irq 8 INTD 0x13
end # USB UHCI
device pci 1d.7 on end # USB2 EHCI
device pci 1e.0 on
device pci 01.0 on
end
device pci 01.0 on end
end
device pci 1f.0 on # PCI-LPC bridge
ioapic_irq 8 INTA 0x11
subsystemid 0x15d9 0x2009
chip superio/winbond/w83627hf
device pnp 2e.0 off end # FDC
@ -101,7 +147,6 @@ chip northbridge/intel/i5000
io 0x62 = 0x64
irq 0x70 = 1
irq 0x72 = 12
end
device pnp 2e.6 off end # CIR
@ -129,7 +174,6 @@ chip northbridge/intel/i5000
register "td2_fan_select" = "0x01"
register "td3_fan_select" = "0x01"
register "td4_fan_select" = "0x01"
device i2c 0x2f on end
end
end # SMBUS