mb/google/brask/var/kuldax: Set PL and PsysPL

1. Set the PL1, PL2 and PL4.
2. Set PsysPL2 and PsysPmax.

BUG=b:253380352 b:253542746
TEST=Compare the measured power from adapter with the value of 'psys'
     from the command 'dump_intel_rapl_consumption'.

Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: I0a7ff64689b39e7754e0aed2f6869881a682fc93
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68437
Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Maulik Vaghela <maulikvaghela@google.com>
Reviewed-by: Derek Huang <derekhuang@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
David Wu 2022-10-14 17:38:54 +08:00 committed by Subrata Banik
parent 55d47bd1bf
commit 6fb95d8558
2 changed files with 61 additions and 0 deletions

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@ -4,5 +4,6 @@ bootblock-y += gpio.c
romstage-y += gpio.c romstage-y += gpio.c
ramstage-y += gpio.c ramstage-y += gpio.c
ramstage-y += ramstage.c
ramstage-$(CONFIG_FW_CONFIG) += fw_config.c ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
ramstage-$(CONFIG_FW_CONFIG) += variant.c ramstage-$(CONFIG_FW_CONFIG) += variant.c

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@ -0,0 +1,60 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/variants.h>
#include <chip.h>
#include <device/device.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <ec/google/chromeec/ec.h>
#include <intelblocks/power_limit.h>
const struct cpu_power_limits limits[] = {
/* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, pl4 */
{ PCI_DID_INTEL_ADL_P_ID_10, 15, 15000, 15000, 55000, 55000, 123000 },
{ PCI_DID_INTEL_ADL_P_ID_7, 15, 15000, 15000, 55000, 55000, 123000 },
{ PCI_DID_INTEL_ADL_P_ID_6, 15, 15000, 15000, 55000, 55000, 123000 },
{ PCI_DID_INTEL_ADL_P_ID_5, 28, 28000, 28000, 64000, 64000, 140000 },
{ PCI_DID_INTEL_ADL_P_ID_3, 28, 28000, 28000, 64000, 64000, 140000 },
};
const struct system_power_limits sys_limits[] = {
/* SKU_ID, TDP (Watts), psys_pl2 (Watts) */
{ PCI_DID_INTEL_ADL_P_ID_10, 15, 65 },
{ PCI_DID_INTEL_ADL_P_ID_7, 15, 150 },
{ PCI_DID_INTEL_ADL_P_ID_6, 15, 150 },
{ PCI_DID_INTEL_ADL_P_ID_5, 28, 150 },
{ PCI_DID_INTEL_ADL_P_ID_3, 28, 150 },
};
/*
* Psys_pmax considerations.
*
* Given the hardware design in kuldax, the serial shunt resistor is 0.005ohm.
* The full scale of hardware PSYS signal 1.6v maps to system current 7.5A
* instead of real system power. The equation is shown below:
* PSYS = 1.6v = (0.01ohm x 7.5A) x 50 (INA213, gain 50V/V) x R501/(R501 + R510)
* R501/(R501 + R510) = 0.858 = 20K / (20K + 3.3K)
*
* The Psys_pmax is a SW setting which tells IMVP9.1 the mapping b/w system input
* current and the actual system power. Since there is no voltage information
* from PSYS, different voltage input would map to different Psys_pmax settings:
* For Type-C 15V, the Psys_pmax should be 15v x 7.5A = 112.5W
* For Type-C 20V, the Psys_pmax should be 20v x 7.5A = 150W
* For a barrel jack, the Psys_pmax should be 20v x 7.5A = 150W
*
* Imagine that there is a type-c 100W (20V/5A) connected to DUT w/ full loading,
* and the Psys_pmax setting is 150W. Then IMVP9.1 can calculate the current system
* power = 150W * 5A / 7.5A = 100W, which is the actual system power.
*/
const struct psys_config psys_config = {
.efficiency = 97,
.psys_imax_ma = 7500,
.bj_volts_mv = 20000
};
void variant_devtree_update(void)
{
size_t total_entries = ARRAY_SIZE(limits);
variant_update_psys_power_limits(limits, sys_limits, total_entries, &psys_config);
variant_update_power_limits(limits, total_entries);
}