GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

google/pyro: Update DPTF settings 

1. Update DPTF CPU/TSR1/TSR2 passive/critial trigger points.
   CPU  passive point:57, critical point:90
   TSR1 passive point:55, critial  point:70
   TSR2 passive point:65, critial  point:80

2. Update DPTF TRT Sample Period.
   CPU: 5s
   TSR0: 50s
   TSR1: 55s
   TSR2: 120s

BUG=none
BRANCH=master
TEST=emerge-pyro coreboot
Change-Id: Ib1b4b31a49d9396b1c5c9dd8d0b9b9998d01744f
Signed-off-by: Kevin Chiu <Kevin.Chiu@quantatw.com>
Reviewed-on: https://review.coreboot.org/17552
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kevin Chiu 2016-11-21 17:59:38 +08:00 committed by Martin Roth
parent 8883e0f126
commit 6fca307ced
1 changed files with 8 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl
View File

@ -14,8 +14,8 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#define DPTF_CPU_PASSIVE 95 #define DPTF_CPU_PASSIVE 57
#define DPTF_CPU_CRITICAL 99 #define DPTF_CPU_CRITICAL 90
#define DPTF_CPU_ACTIVE_AC0 90 #define DPTF_CPU_ACTIVE_AC0 90
#define DPTF_CPU_ACTIVE_AC1 80 #define DPTF_CPU_ACTIVE_AC1 80
#define DPTF_CPU_ACTIVE_AC2 70 #define DPTF_CPU_ACTIVE_AC2 70
@ -29,13 +29,13 @@
#define DPTF_TSR1_SENSOR_ID 1 #define DPTF_TSR1_SENSOR_ID 1
#define DPTF_TSR1_SENSOR_NAME "Ambient" #define DPTF_TSR1_SENSOR_NAME "Ambient"
#define DPTF_TSR1_PASSIVE 60 #define DPTF_TSR1_PASSIVE 55
#define DPTF_TSR1_CRITICAL 70 #define DPTF_TSR1_CRITICAL 70
#define DPTF_TSR2_SENSOR_ID 2 #define DPTF_TSR2_SENSOR_ID 2
#define DPTF_TSR2_SENSOR_NAME "Charger" #define DPTF_TSR2_SENSOR_NAME "Charger"
#define DPTF_TSR2_PASSIVE 55 #define DPTF_TSR2_PASSIVE 65
#define DPTF_TSR2_CRITICAL 100 #define DPTF_TSR2_CRITICAL 80
#define DPTF_ENABLE_CHARGER #define DPTF_ENABLE_CHARGER
@ -53,7 +53,7 @@ Name (DTRT, Package () {
Package () { \_SB.PCI0.TCPU, \_SB.PCI0.TCPU, 100, 50, 0, 0, 0, 0 }, Package () { \_SB.PCI0.TCPU, \_SB.PCI0.TCPU, 100, 50, 0, 0, 0, 0 },
/* CPU Effect on Temp Sensor 0 */ /* CPU Effect on Temp Sensor 0 */
Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 }, Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 100, 500, 0, 0, 0, 0 },
#ifdef DPTF_ENABLE_CHARGER #ifdef DPTF_ENABLE_CHARGER
/* Charger Effect on Temp Sensor 1 */ /* Charger Effect on Temp Sensor 1 */
@ -61,10 +61,10 @@ Name (DTRT, Package () {
#endif #endif
/* CPU Effect on Temp Sensor 1 */ /* CPU Effect on Temp Sensor 1 */
Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 }, Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 100, 550, 0, 0, 0, 0 },
/* CPU Effect on Temp Sensor 2 */ /* CPU Effect on Temp Sensor 2 */
Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 }, Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR2, 100, 1200, 0, 0, 0, 0 },
}) })
Name (MPPC, Package () Name (MPPC, Package ()