From 6fcfd919f1f6231bb03eefcff01cc39cb18abb90 Mon Sep 17 00:00:00 2001 From: Shaunak Saha Date: Mon, 19 Sep 2016 14:55:24 -0700 Subject: [PATCH] soc/apollolake: Correct the comment section in gpio.asl This patch corrects the comment section in gpio.asl for GPE method. Change-Id: I45771a295ee1eda00b9699f42cddd120223ff7bf Signed-off-by: Shaunak Saha Reviewed-on: https://review.coreboot.org/16647 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/apollolake/acpi/gpio.asl | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/soc/intel/apollolake/acpi/gpio.asl b/src/soc/intel/apollolake/acpi/gpio.asl index 4f3bc3ee2c..ffc5b75937 100644 --- a/src/soc/intel/apollolake/acpi/gpio.asl +++ b/src/soc/intel/apollolake/acpi/gpio.asl @@ -191,7 +191,8 @@ scope (\_SB) { Scope(\_GPE) { - /* Dummy method for the Tier 1 GPIO SCI enable bit. When kernel reads + /* + * Dummy method for the Tier 1 GPIO SCI enable bit. When kernel reads * _L0F in scope GPE it sets bit for gpio_tier1_sci_en in ACPI enable * register at 0x430. For APL ACPI enable register DW0 i.e., ACPI * GPE0a_EN at 0x430 is reserved.