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payloads: Add whitespace around '<<' 

Change-Id: I0659f6ec59fb808b4cedf57d60d737c13c250042
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/20396
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Elyes HAOUAS 2017-06-27 21:51:20 +02:00 committed by Stefan Reinauer
parent 42b37f537f
commit 70083a1de9
10 changed files with 105 additions and 105 deletions
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2
payloads/libpayload/drivers/udc/dwc2.c
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@ -317,7 +317,7 @@ static int find_tx_fifo(struct usbdev_ctrl *this, uint32_t mps)
int i, val; int i, val;
for (i = 1; i < MAX_EPS_CHANNELS - 1; i++) { for (i = 1; i < MAX_EPS_CHANNELS - 1; i++) {
if (p->fifo_map & (1<<i)) if (p->fifo_map & (1 << i))
continue; continue;
gtxfsiz.d32 = readl(&p->regs->core.dptxfsiz_dieptxf[i]); gtxfsiz.d32 = readl(&p->regs->core.dptxfsiz_dieptxf[i]);
val = gtxfsiz.txfdep * 4; val = gtxfsiz.txfdep * 4;

10
payloads/libpayload/drivers/usb/ehci_private.h
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@ -101,7 +101,7 @@ typedef volatile struct {
#define QTD_CPAGE_SHIFT 12 #define QTD_CPAGE_SHIFT 12
#define QTD_CPAGE_MASK (7 << QTD_CPAGE_SHIFT) #define QTD_CPAGE_MASK (7 << QTD_CPAGE_SHIFT)
#define QTD_TOTAL_LEN_SHIFT 16 #define QTD_TOTAL_LEN_SHIFT 16
#define QTD_TOTAL_LEN_MASK (((1<<15)-1) << QTD_TOTAL_LEN_SHIFT) #define QTD_TOTAL_LEN_MASK (((1 << 15)-1) << QTD_TOTAL_LEN_SHIFT)
#define QTD_TOGGLE_SHIFT 31 #define QTD_TOGGLE_SHIFT 31
#define QTD_TOGGLE_MASK (1 << 31) #define QTD_TOGGLE_MASK (1 << 31)
#define QTD_TOGGLE_DATA0 0 #define QTD_TOGGLE_DATA0 0
@ -113,10 +113,10 @@ typedef volatile struct {
typedef volatile struct { typedef volatile struct {
u32 horiz_link_ptr; u32 horiz_link_ptr;
#define QH_TERMINATE 1 #define QH_TERMINATE 1
#define QH_iTD (0<<1) #define QH_iTD (0 << 1)
#define QH_QH (1<<1) #define QH_QH (1 << 1)
#define QH_siTD (2<<1) #define QH_siTD (2 << 1)
#define QH_FSTN (3<<1) #define QH_FSTN (3 << 1)
u32 epchar; u32 epchar;
#define QH_EP_SHIFT 8 #define QH_EP_SHIFT 8
#define QH_EPS_SHIFT 12 #define QH_EPS_SHIFT 12

4
payloads/libpayload/drivers/usb/ohci.c
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@ -232,8 +232,8 @@ ohci_init (unsigned long physical_bar)
OHCI_INST (controller)->opreg->HcControl |= PeriodicListEnable; OHCI_INST (controller)->opreg->HcControl |= PeriodicListEnable;
OHCI_INST (controller)->opreg->HcControl &= ~IsochronousEnable; // unused by this driver OHCI_INST (controller)->opreg->HcControl &= ~IsochronousEnable; // unused by this driver
// disable everything, contrary to what OHCI spec says in 5.1.1.4, as we don't need IRQs // disable everything, contrary to what OHCI spec says in 5.1.1.4, as we don't need IRQs
OHCI_INST (controller)->opreg->HcInterruptEnable = 1<<31; OHCI_INST (controller)->opreg->HcInterruptEnable = 1 << 31;
OHCI_INST (controller)->opreg->HcInterruptDisable = ~(1<<31); OHCI_INST (controller)->opreg->HcInterruptDisable = ~(1 << 31);
OHCI_INST (controller)->opreg->HcInterruptStatus = ~0; OHCI_INST (controller)->opreg->HcInterruptStatus = ~0;
OHCI_INST (controller)->opreg->HcPeriodicStart = (((OHCI_INST (controller)->opreg->HcFmInterval & FrameIntervalMask) / 10) * 9); OHCI_INST (controller)->opreg->HcPeriodicStart = (((OHCI_INST (controller)->opreg->HcFmInterval & FrameIntervalMask) / 10) * 9);
OHCI_INST (controller)->opreg->HcControl = (OHCI_INST (controller)->opreg->HcControl & ~HostControllerFunctionalStateMask) | USBOperational; OHCI_INST (controller)->opreg->HcControl = (OHCI_INST (controller)->opreg->HcControl & ~HostControllerFunctionalStateMask) | USBOperational;

122
payloads/libpayload/drivers/usb/ohci_private.h
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@ -38,13 +38,13 @@
typedef enum { CMD} reg; typedef enum { CMD} reg;
enum { enum {
NumberDownstreamPorts = 1<<0, NumberDownstreamPorts = 1 << 0,
PowerSwitchingMode = 1<<8, PowerSwitchingMode = 1 << 8,
NoPowerSwitching = 1<<9, NoPowerSwitching = 1 << 9,
DeviceType = 1<<10, DeviceType = 1 << 10,
OverCurrentProtectionMode = 1<<11, OverCurrentProtectionMode = 1 << 11,
NoOverCurrentProtection = 1<<12, NoOverCurrentProtection = 1 << 12,
PowerOnToPowerGoodTime = 1<<24 PowerOnToPowerGoodTime = 1 << 24
} HcRhDescriptorAReg; } HcRhDescriptorAReg;
enum { enum {
@ -53,47 +53,47 @@
} HcRhDescriptorAMask; } HcRhDescriptorAMask;
enum { enum {
DeviceRemovable = 1<<0, DeviceRemovable = 1 << 0,
PortPowerControlMask = 1<<16 PortPowerControlMask = 1 << 16
} HcRhDescriptorBReg; } HcRhDescriptorBReg;
enum { enum {
CurrentConnectStatus = 1<<0, CurrentConnectStatus = 1 << 0,
PortEnableStatus = 1<<1, PortEnableStatus = 1 << 1,
PortSuspendStatus = 1<<2, PortSuspendStatus = 1 << 2,
PortOverCurrentIndicator = 1<<3, PortOverCurrentIndicator = 1 << 3,
PortResetStatus = 1<<4, PortResetStatus = 1 << 4,
PortPowerStatus = 1<<8, PortPowerStatus = 1 << 8,
LowSpeedDeviceAttached = 1<<9, LowSpeedDeviceAttached = 1 << 9,
ConnectStatusChange = 1<<16, ConnectStatusChange = 1 << 16,
PortEnableStatusChange = 1<<17, PortEnableStatusChange = 1 << 17,
PortSuspendStatusChange = 1<<18, PortSuspendStatusChange = 1 << 18,
PortOverCurrentIndicatorChange = 1<<19, PortOverCurrentIndicatorChange = 1 << 19,
PortResetStatusChange = 1<<20 PortResetStatusChange = 1 << 20
} HcRhPortStatusRead; } HcRhPortStatusRead;
enum { enum {
ClearPortEnable = 1<<0, ClearPortEnable = 1 << 0,
SetPortEnable = 1<<1, SetPortEnable = 1 << 1,
SetPortSuspend = 1<<2, SetPortSuspend = 1 << 2,
ClearSuspendStatus = 1<<3, ClearSuspendStatus = 1 << 3,
SetPortReset = 1<<4, SetPortReset = 1 << 4,
SetPortPower = 1<<8, SetPortPower = 1 << 8,
ClearPortPower = 1<<9, ClearPortPower = 1 << 9,
} HcRhPortStatusSet; } HcRhPortStatusSet;
enum { enum {
LocalPowerStatus = 1<<0, LocalPowerStatus = 1 << 0,
OverCurrentIndicator = 1<<1, OverCurrentIndicator = 1 << 1,
DeviceRemoteWakeupEnable = 1<<15, DeviceRemoteWakeupEnable = 1 << 15,
LocalPowerStatusChange = 1<<16, LocalPowerStatusChange = 1 << 16,
OverCurrentIndicatorChange = 1<<17, OverCurrentIndicatorChange = 1 << 17,
ClearRemoteWakeupEnable = 1<<31 ClearRemoteWakeupEnable = 1 << 31
} HcRhStatusReg; } HcRhStatusReg;
enum { enum {
FrameInterval = 1<<0, FrameInterval = 1 << 0,
FSLargestDataPacket = 1<<16, FSLargestDataPacket = 1 << 16,
FrameIntervalToggle = 1<<31 FrameIntervalToggle = 1 << 31
} HcFmIntervalOffset; } HcFmIntervalOffset;
enum { enum {
FrameIntervalMask = MASK(0, 14), FrameIntervalMask = MASK(0, 14),
@ -102,15 +102,15 @@
} HcFmIntervalMask; } HcFmIntervalMask;
enum { enum {
ControlBulkServiceRatio = 1<<0, ControlBulkServiceRatio = 1 << 0,
PeriodicListEnable = 1<<2, PeriodicListEnable = 1 << 2,
IsochronousEnable = 1<<3, IsochronousEnable = 1 << 3,
ControlListEnable = 1<<4, ControlListEnable = 1 << 4,
BulkListEnable = 1<<5, BulkListEnable = 1 << 5,
HostControllerFunctionalState = 1<<6, HostControllerFunctionalState = 1 << 6,
InterruptRouting = 1<<8, InterruptRouting = 1 << 8,
RemoteWakeupConnected = 1<<9, RemoteWakeupConnected = 1 << 9,
RemoteWakeupEnable = 1<<10 RemoteWakeupEnable = 1 << 10
} HcControlReg; } HcControlReg;
enum { enum {
@ -126,11 +126,11 @@
}; };
enum { enum {
HostControllerReset = 1<<0, HostControllerReset = 1 << 0,
ControlListFilled = 1<<1, ControlListFilled = 1 << 1,
BulkListFilled = 1<<2, BulkListFilled = 1 << 2,
OwnershipChangeRequest = 1<<3, OwnershipChangeRequest = 1 << 3,
SchedulingOverrunCount = 1<<16 SchedulingOverrunCount = 1 << 16
} HcCommandStatusReg; } HcCommandStatusReg;
enum { enum {
@ -138,19 +138,19 @@
} HcCommandStatusMask; } HcCommandStatusMask;
enum { enum {
FrameRemaining = 1<<0, FrameRemaining = 1 << 0,
FrameRemainingToggle = 1<<31 FrameRemainingToggle = 1 << 31
} HcFmRemainingReg; } HcFmRemainingReg;
enum { enum {
SchedulingOverrung = 1<<0, SchedulingOverrung = 1 << 0,
WritebackDoneHead = 1<<1, WritebackDoneHead = 1 << 1,
StartofFrame = 1<<2, StartofFrame = 1 << 2,
ResumeDetected = 1<<3, ResumeDetected = 1 << 3,
UnrecoverableError = 1<<4, UnrecoverableError = 1 << 4,
FrameNumberOverflow = 1<<5, FrameNumberOverflow = 1 << 5,
RootHubStatusChange = 1<<6, RootHubStatusChange = 1 << 6,
OwnershipChange = 1<<30 OwnershipChange = 1 << 30
} HcInterruptStatusReg; } HcInterruptStatusReg;
typedef struct { typedef struct {

2
payloads/libpayload/drivers/usb/uhci_private.h
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@ -57,7 +57,7 @@ typedef struct {
u32 token; u32 token;
#define TD_PID_MASK 0xff #define TD_PID_MASK 0xff
#define TD_DEVADDR_SHIFT 8 #define TD_DEVADDR_SHIFT 8
#define TD_DEVADDR_MASK (((1<<7)-1) << TD_DEVADDR_SHIFT) #define TD_DEVADDR_MASK (((1 << 7)-1) << TD_DEVADDR_SHIFT)
#define TD_EP_SHIFT 15 #define TD_EP_SHIFT 15
#define TD_EP_MASK (0xf << TD_EP_SHIFT) #define TD_EP_MASK (0xf << TD_EP_SHIFT)
#define TD_TOGGLE_SHIFT 19 #define TD_TOGGLE_SHIFT 19

44
payloads/libpayload/drivers/usb/xhci_private.h
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@ -414,34 +414,34 @@ typedef struct xhci {
u8 res3[0x3ff-0x3c+1]; u8 res3[0x3ff-0x3c+1];
struct { struct {
u32 portsc; u32 portsc;
#define PORTSC_CCS (1<<0) #define PORTSC_CCS (1 << 0)
#define PORTSC_PED (1<<1) #define PORTSC_PED (1 << 1)
// BIT 2 rsvdZ // BIT 2 rsvdZ
#define PORTSC_OCA (1<<3) #define PORTSC_OCA (1 << 3)
#define PORTSC_PR (1<<4) #define PORTSC_PR (1 << 4)
#define PORTSC_PLS (1<<5) #define PORTSC_PLS (1 << 5)
#define PORTSC_PLS_MASK MASK(5, 4) #define PORTSC_PLS_MASK MASK(5, 4)
#define PORTSC_PP (1<<9) #define PORTSC_PP (1 << 9)
#define PORTSC_PORT_SPEED_START 10 #define PORTSC_PORT_SPEED_START 10
#define PORTSC_PORT_SPEED (1<<PORTSC_PORT_SPEED_START) #define PORTSC_PORT_SPEED (1 << PORTSC_PORT_SPEED_START)
#define PORTSC_PORT_SPEED_MASK MASK(PORTSC_PORT_SPEED_START, 4) #define PORTSC_PORT_SPEED_MASK MASK(PORTSC_PORT_SPEED_START, 4)
#define PORTSC_PIC (1<<14) #define PORTSC_PIC (1 << 14)
#define PORTSC_PIC_MASK MASK(14, 2) #define PORTSC_PIC_MASK MASK(14, 2)
#define PORTSC_LWS (1<<16) #define PORTSC_LWS (1 << 16)
#define PORTSC_CSC (1<<17) #define PORTSC_CSC (1 << 17)
#define PORTSC_PEC (1<<18) #define PORTSC_PEC (1 << 18)
#define PORTSC_WRC (1<<19) #define PORTSC_WRC (1 << 19)
#define PORTSC_OCC (1<<20) #define PORTSC_OCC (1 << 20)
#define PORTSC_PRC (1<<21) #define PORTSC_PRC (1 << 21)
#define PORTSC_PLC (1<<22) #define PORTSC_PLC (1 << 22)
#define PORTSC_CEC (1<<23) #define PORTSC_CEC (1 << 23)
#define PORTSC_CAS (1<<24) #define PORTSC_CAS (1 << 24)
#define PORTSC_WCE (1<<25) #define PORTSC_WCE (1 << 25)
#define PORTSC_WDE (1<<26) #define PORTSC_WDE (1 << 26)
#define PORTSC_WOE (1<<27) #define PORTSC_WOE (1 << 27)
// BIT 29:28 rsvdZ // BIT 29:28 rsvdZ
#define PORTSC_DR (1<<30) #define PORTSC_DR (1 << 30)
#define PORTSC_WPR (1<<31) #define PORTSC_WPR (1 << 31)
#define PORTSC_RW_MASK (PORTSC_PR | PORTSC_PLS_MASK | PORTSC_PP | PORTSC_PIC_MASK | PORTSC_LWS | PORTSC_WCE | PORTSC_WDE | PORTSC_WOE) #define PORTSC_RW_MASK (PORTSC_PR | PORTSC_PLS_MASK | PORTSC_PP | PORTSC_PIC_MASK | PORTSC_LWS | PORTSC_WCE | PORTSC_WDE | PORTSC_WOE)
u32 portpmsc; u32 portpmsc;
u32 portli; u32 portli;

2
payloads/libpayload/drivers/video/corebootfb.c
View File

@ -192,7 +192,7 @@ static void corebootfb_update_cursor(void)
int ch, paint; int ch, paint;
if(cursor_en) { if(cursor_en) {
ch = CHARS[cursor_y * coreboot_video_console.columns + cursor_x]; ch = CHARS[cursor_y * coreboot_video_console.columns + cursor_x];
paint = (ch & 0xff) | ((ch<<4) & 0xf000) | ((ch >> 4) & 0x0f00); paint = (ch & 0xff) | ((ch << 4) & 0xf000) | ((ch >> 4) & 0x0f00);
} else { } else {
paint = CHARS[cursor_y * coreboot_video_console.columns + cursor_x]; paint = CHARS[cursor_y * coreboot_video_console.columns + cursor_x];
} }

8
payloads/libpayload/include/arm64/arch/lib_helpers.h
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@ -98,10 +98,10 @@
#include <stdint.h> #include <stdint.h>
#define DAIF_DBG_BIT (1<<3) #define DAIF_DBG_BIT (1 << 3)
#define DAIF_ABT_BIT (1<<2) #define DAIF_ABT_BIT (1 << 2)
#define DAIF_IRQ_BIT (1<<1) #define DAIF_IRQ_BIT (1 << 1)
#define DAIF_FIQ_BIT (1<<0) #define DAIF_FIQ_BIT (1 << 0)
#define SWITCH_CASE_READ(func, var, type, el) do { \ #define SWITCH_CASE_READ(func, var, type, el) do { \
type var = -1; \ type var = -1; \

6
payloads/libpayload/include/stddef.h
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@ -21,9 +21,9 @@ typedef __SIZE_TYPE__ ssize_t;
"`struct " #structure "` offset for `" #member "` is not " #offset) "`struct " #structure "` offset for `" #member "` is not " #offset)
/* Standard units. */ /* Standard units. */
#define KiB (1<<10) #define KiB (1 << 10)
#define MiB (1<<20) #define MiB (1 << 20)
#define GiB (1<<30) #define GiB (1 << 30)
#define KHz (1000) #define KHz (1000)
#define MHz (1000*KHz) #define MHz (1000*KHz)

10
payloads/libpayload/liblz4/lz4.c.inc
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@ -64,17 +64,17 @@ static void LZ4_wildCopy(void* dstPtr, const void* srcPtr, void* dstEnd)
#define MFLIMIT (WILDCOPYLENGTH+MINMATCH) #define MFLIMIT (WILDCOPYLENGTH+MINMATCH)
static const int LZ4_minLength = (MFLIMIT+1); static const int LZ4_minLength = (MFLIMIT+1);
#define KB *(1 <<10) #define KB *(1 << 10)
#define MB *(1 <<20) #define MB *(1 << 20)
#define GB *(1U<<30) #define GB *(1U << 30)
#define MAXD_LOG 16 #define MAXD_LOG 16
#define MAX_DISTANCE ((1 << MAXD_LOG) - 1) #define MAX_DISTANCE ((1 << MAXD_LOG) - 1)
#define ML_BITS 4 #define ML_BITS 4
#define ML_MASK ((1U<<ML_BITS)-1) #define ML_MASK ((1U << ML_BITS)-1)
#define RUN_BITS (8-ML_BITS) #define RUN_BITS (8-ML_BITS)
#define RUN_MASK ((1U<<RUN_BITS)-1) #define RUN_MASK ((1U << RUN_BITS)-1)
/************************************** /**************************************