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mb/google/sarien: Send post code to the EC 

Use the mainboard post code hook to inform the wilco EC driver of the
every stage.

BUG=b:124401932,b:133466714,b:133600566
BRANCH=sarien
TEST=Remove DIMM module, confirm diagnostic LED pattern for memory
failure (2 amber, 4 white).

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Change-Id: Ic71e4a6e62b63ca2fd189957c4d6f49b61b934de
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33047
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Eric Lai 2019-05-28 23:49:32 +08:00 committed by Furquan Shaikh
parent c30e59051f
commit 702f838977
3 changed files with 28 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/mainboard/google/sarien/Makefile.inc
View File

@ -29,5 +29,10 @@ verstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB) += hda_verb.c
bootblock-$(CONFIG_EC_GOOGLE_WILCO) += ec.c
ramstage-$(CONFIG_EC_GOOGLE_WILCO) += ec.c
romstage-$(CONFIG_EC_GOOGLE_WILCO) += ec.c
verstage-$(CONFIG_EC_GOOGLE_WILCO) += ec.c
subdirs-y += variants/$(VARIANT_DIR)
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include

23
src/mainboard/google/sarien/ec.c Normal file
View File

@ -0,0 +1,23 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2019 Google LLC
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <ec/google/wilco/commands.h>
#include <variant/ec.h>
void mainboard_post(uint8_t value)
{
wilco_ec_save_post_code(value);
}

6
src/mainboard/google/sarien/ramstage.c
View File

@ -15,7 +15,6 @@
#include <arch/acpi.h>
#include <drivers/vpd/vpd.h>
#include <ec/google/wilco/commands.h>
#include <smbios.h>
#include <soc/gpio.h>
#include <soc/ramstage.h>
@ -70,11 +69,6 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params)
cnl_configure_pads(gpio_table, num_gpios);
}
void mainboard_post(uint8_t value)
{
wilco_ec_save_post_code(value);
}
static void mainboard_enable(struct device *dev)
{
dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator;