tegra132: add usb initialization support to funit
Continuing down the path of easing mainboard maintenance provide a way to bring up the USB 2.0 ports through funit. BUG=chrome-os-partner:31251 BRANCH=None TEST=With ryu patch was able to get same sporadic USB communication. Change-Id: Ic75821acf1d48a9f1659849fa007251c61658640 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 5183c5081a95219f84c4d6dfca70926b383abc1a Original-Change-Id: Iee5ca30b3c8b876a9cae7b91db096fef933a8412 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/212332 Original-Reviewed-by: Tom Warren <twarren@nvidia.com> Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8938 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -15,6 +15,7 @@ bootblock-y += ../tegra/i2c.c
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bootblock-y += ../tegra/pingroup.c
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bootblock-y += ../tegra/pinmux.c
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bootblock-y += ../tegra/apbmisc.c
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bootblock-y += ../tegra/usb.c
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ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
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bootblock-$(CONFIG_DRIVERS_UART) += uart.c
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endif
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@ -40,6 +41,7 @@ romstage-y += sdram_lp0.c
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romstage-y += ../tegra/gpio.c
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romstage-y += ../tegra/i2c.c
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romstage-y += ../tegra/pinmux.c
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romstage-y += ../tegra/usb.c
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romstage-$(CONFIG_DRIVERS_UART) += uart.c
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ramstage-y += addressmap.c
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@ -23,6 +23,7 @@
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#include <soc/clock.h>
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#include <soc/padconfig.h>
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#include <string.h>
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#include <soc/nvidia/tegra/usb.h>
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struct clk_dev_control {
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uint32_t *clk_enb_set;
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@ -73,6 +74,14 @@ static const struct clk_dev_control clk_data_arr[] = {
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.clk_enb_val = CLK_##clk_set_##_##funit_, \
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}
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#define FUNIT_DATA_USB(funit_, clk_set_) \
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[FUNIT_INDEX(funit_)] = { \
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.name = STRINGIFY(funit_), \
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.ctlr_base = (void *)(uintptr_t)TEGRA_##funit_##_BASE, \
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.dev_control = &clk_data_arr[CLK_##clk_set_##_SET], \
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.clk_enb_val = CLK_##clk_set_##_##funit_, \
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}
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static const struct funit_cfg_data funit_data[] = {
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FUNIT_DATA(SBC1, sbc1, H),
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FUNIT_DATA(SBC4, sbc4, U),
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@ -81,6 +90,9 @@ static const struct funit_cfg_data funit_data[] = {
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FUNIT_DATA(I2C5, i2c5, H),
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FUNIT_DATA(SDMMC3, sdmmc3, U),
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FUNIT_DATA(SDMMC4, sdmmc4, L),
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FUNIT_DATA_USB(USBD, L),
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FUNIT_DATA_USB(USB2, H),
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FUNIT_DATA_USB(USB3, H),
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};
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_Static_assert(ARRAY_SIZE(funit_data) == FUNIT_INDEX_MAX,
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"funit_cfg_data array not filled out!");
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@ -129,6 +141,11 @@ static void configure_clock(const struct funit_cfg * const entry,
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clk_div_mask, entry->clk_src_id);
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}
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static inline int is_usb(uint32_t idx)
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{
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return (idx == FUNIT_USBD || idx == FUNIT_USB2 || idx == FUNIT_USB3);
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}
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void soc_configure_funits(const struct funit_cfg * const entries, size_t num)
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{
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size_t i;
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@ -137,6 +154,7 @@ void soc_configure_funits(const struct funit_cfg * const entries, size_t num)
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const struct funit_cfg * const entry = &entries[i];
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const struct funit_cfg_data *funit;
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const struct clk_dev_control *dev_control;
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int funit_usb = is_usb(entry->funit_index);
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if (entry->funit_index >= FUNIT_INDEX_MAX) {
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printk(BIOS_ERR, "Error: Index out of bounds\n");
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@ -146,12 +164,17 @@ void soc_configure_funits(const struct funit_cfg * const entries, size_t num)
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funit = &funit_data[entry->funit_index];
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dev_control = funit->dev_control;
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configure_clock(entry, funit);
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/* USB controllers have a fixed clock source. */
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if (!funit_usb)
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configure_clock(entry, funit);
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clock_grp_enable_clear_reset(funit->clk_enb_val,
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dev_control->clk_enb_set,
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dev_control->rst_dev_clr);
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if (funit_usb)
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usb_setup_utmip(funit->ctlr_base);
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soc_configure_pads(entry->pad_cfg,entry->pad_cfg_size);
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}
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}
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@ -35,6 +35,9 @@ enum {
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FUNIT_INDEX(I2C5),
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FUNIT_INDEX(SDMMC3),
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FUNIT_INDEX(SDMMC4),
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FUNIT_INDEX(USBD),
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FUNIT_INDEX(USB2),
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FUNIT_INDEX(USB3),
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FUNIT_INDEX_MAX,
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};
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@ -55,6 +58,13 @@ struct funit_cfg {
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.pad_cfg_size = _cfg_size, \
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}
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#define FUNIT_CFG_USB(_funit) \
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{ \
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.funit_index = FUNIT_INDEX(_funit), \
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.pad_cfg = NULL, \
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.pad_cfg_size = 0, \
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}
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/*
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* Configure the funits associated with entry according to the configuration.
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*/
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