uart: Support multiple ports

The port for console remains to be a compile time constant.
The Kconfig option is changed to select an UART port with index
to avoid putting map of UART base addresses in Kconfigs.

With this change it is possible to have other than debug console
on different UART port.

Change-Id: Ie1845a946f8d3b2604ef5404edb31b2e811f3ccd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5342
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Kyösti Mälkki 2014-03-14 22:28:29 +02:00
parent a8d089d3ac
commit 70342a7f51
19 changed files with 147 additions and 311 deletions

View File

@ -32,7 +32,7 @@
void console_hw_init(void)
{
#if CONFIG_CONSOLE_SERIAL
uart_init();
uart_init(CONFIG_UART_FOR_CONSOLE);
#endif
#if CONFIG_CONSOLE_NE2K
ne2k_init(CONFIG_CONSOLE_NE2K_IO_PORT);
@ -42,7 +42,7 @@ void console_hw_init(void)
void console_tx_byte(unsigned char byte)
{
#if CONFIG_CONSOLE_SERIAL
uart_tx_byte(byte);
uart_tx_byte(CONFIG_UART_FOR_CONSOLE, byte);
#endif
#if CONFIG_CONSOLE_NE2K
ne2k_append_data_byte(byte, CONFIG_CONSOLE_NE2K_IO_PORT);
@ -52,7 +52,7 @@ void console_tx_byte(unsigned char byte)
void console_tx_flush(void)
{
#if CONFIG_CONSOLE_SERIAL
uart_tx_flush();
uart_tx_flush(CONFIG_UART_FOR_CONSOLE);
#endif
#if CONFIG_CONSOLE_NE2K
ne2k_transmit(CONFIG_CONSOLE_NE2K_IO_PORT);

View File

@ -48,39 +48,21 @@ if CONSOLE_SERIAL
comment "device-specific UART"
depends on HAVE_UART_SPECIAL
choice
prompt "Serial port for 8250"
default CONSOLE_SERIAL_COM1
depends on DRIVERS_UART_8250IO
config CONSOLE_SERIAL_COM1
bool "COM1/ttyS0, I/O port 0x3f8"
help
Serial console on COM1/ttyS0 at I/O port 0x3f8.
config CONSOLE_SERIAL_COM2
bool "COM2/ttyS1, I/O port 0x2f8"
help
Serial console on COM2/ttyS1 at I/O port 0x2f8.
config CONSOLE_SERIAL_COM3
bool "COM3/ttyS2, I/O port 0x3e8"
help
Serial console on COM3/ttyS2 at I/O port 0x3e8.
config CONSOLE_SERIAL_COM4
bool "COM4/ttyS3, I/O port 0x2e8"
help
Serial console on COM4/ttyS3 at I/O port 0x2e8.
endchoice
config UART_FOR_CONSOLE
prompt "Index for UART port to use for console"
default 0
# FIXME: Early programming in romstage is incorrect as we should
# program different LDN to actually change the physical port.
config TTYS0_BASE
hex
depends on DRIVERS_UART_8250IO
default 0x3f8 if CONSOLE_SERIAL_COM1
default 0x2f8 if CONSOLE_SERIAL_COM2
default 0x3e8 if CONSOLE_SERIAL_COM3
default 0x2e8 if CONSOLE_SERIAL_COM4
default 0x3f8 if UART_FOR_CONSOLE = 0
default 0x2f8 if UART_FOR_CONSOLE = 1
default 0x3e8 if UART_FOR_CONSOLE = 2
default 0x2e8 if UART_FOR_CONSOLE = 3
help
Map the COM port names to the respective I/O port.
Map the COM port number to the respective I/O port.
choice
prompt "Baud rate"

View File

@ -72,51 +72,8 @@ config SYS_SDRAM_BASE
hex
default 0x40000000
choice CONSOLE_SERIAL_UART_CHOICES
prompt "Serial Console UART"
default CONSOLE_SERIAL_UART0
depends on CONSOLE_SERIAL
config CONSOLE_SERIAL_UART0
bool "UART0"
help
Serial console on UART0
config CONSOLE_SERIAL_UART1
bool "UART1"
help
Serial console on UART1
config CONSOLE_SERIAL_UART2
bool "UART2"
help
Serial console on UART2
config CONSOLE_SERIAL_UART3
bool "UART3"
help
Serial console on UART3
config CONSOLE_SERIAL_UART4
bool "UART4"
help
Serial console on UART4
config CONSOLE_SERIAL_UART5
bool "UART5"
help
Serial console on UART5
config CONSOLE_SERIAL_UART6
bool "UART6"
help
Serial console on UART6
config CONSOLE_SERIAL_UART7
bool "UART7"
help
Serial console on UART7
endchoice
config UART_FOR_CONSOLE
int
default 0
endif # if CPU_ALLWINNER_A10

View File

@ -14,28 +14,13 @@
#include <cpu/allwinner/a10/uart.h>
static void *get_console_uart_base_addr(void)
unsigned int uart_platform_base(int idx)
{
/* This big block gets compiled to a constant, not a function call */
if (CONFIG_CONSOLE_SERIAL_UART0)
return (void *)A1X_UART0_BASE;
else if (CONFIG_CONSOLE_SERIAL_UART1)
return (void *)A1X_UART1_BASE;
else if (CONFIG_CONSOLE_SERIAL_UART2)
return (void *)A1X_UART2_BASE;
else if (CONFIG_CONSOLE_SERIAL_UART3)
return (void *)A1X_UART3_BASE;
else if (CONFIG_CONSOLE_SERIAL_UART4)
return (void *)A1X_UART4_BASE;
else if (CONFIG_CONSOLE_SERIAL_UART5)
return (void *)A1X_UART5_BASE;
else if (CONFIG_CONSOLE_SERIAL_UART6)
return (void *)A1X_UART6_BASE;
else if (CONFIG_CONSOLE_SERIAL_UART7)
return (void *)A1X_UART7_BASE;
/* If selection is invalid, default to UART0 */
return (void *)A1X_UART0_BASE;
/* UART blocks are mapped 0x400 bytes apart */
if (idx < 8)
return A1X_UART0_BASE + 0x400 * idx;
else
return 0;
}
/* FIXME: We assume clock is 24MHz, which may not be the case. */
@ -44,14 +29,9 @@ unsigned int uart_platform_refclk(void)
return 24000000;
}
unsigned int uart_platform_base(int idx)
void uart_init(int idx)
{
return (unsigned int)get_console_uart_base_addr();
}
void uart_init(void)
{
void *uart_base = get_console_uart_base_addr();
void *uart_base = uart_platform_baseptr(idx);
/* Use default 8N1 encoding */
a10_uart_configure(uart_base, default_baudrate(),
@ -59,17 +39,17 @@ void uart_init(void)
a10_uart_enable_fifos(uart_base);
}
unsigned char uart_rx_byte(void)
unsigned char uart_rx_byte(int idx)
{
return a10_uart_rx_blocking(get_console_uart_base_addr());
return a10_uart_rx_blocking(uart_platform_baseptr(idx));
}
void uart_tx_byte(unsigned char data)
void uart_tx_byte(int idx, unsigned char data)
{
a10_uart_tx_blocking(get_console_uart_base_addr(), data);
a10_uart_tx_blocking(uart_platform_baseptr(idx), data);
}
void uart_tx_flush(void)
void uart_tx_flush(int idx)
{
}
@ -78,7 +58,7 @@ void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(0);
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = default_baudrate();
lb_add_serial(&serial, data);

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@ -88,41 +88,8 @@ config SYS_SDRAM_BASE
hex
default 0x40000000
choice CONSOLE_SERIAL_UART_CHOICES
prompt "Serial Console UART"
default CONSOLE_SERIAL_UART3
depends on CONSOLE_SERIAL
config CONSOLE_SERIAL_UART0
bool "UART0"
help
Serial console on UART0
config CONSOLE_SERIAL_UART1
bool "UART1"
help
Serial console on UART1
config CONSOLE_SERIAL_UART2
bool "UART2"
help
Serial console on UART2
config CONSOLE_SERIAL_UART3
bool "UART3"
help
Serial console on UART3
endchoice
config CONSOLE_SERIAL_UART_ADDRESS
hex
depends on CONSOLE_SERIAL
default 0x12c00000 if CONSOLE_SERIAL_UART0
default 0x12c10000 if CONSOLE_SERIAL_UART1
default 0x12c20000 if CONSOLE_SERIAL_UART2
default 0x12c30000 if CONSOLE_SERIAL_UART3
help
Map the UART names to the respective MMIO address.
config UART_FOR_CONSOLE
int
default 3
endif

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@ -157,30 +157,33 @@ static void exynos5_uart_tx_flush(struct s5p_uart *uart)
unsigned int uart_platform_base(int idx)
{
return CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
if (idx < 4)
return 0x12c00000 + idx * 0x10000;
else
return 0;
}
void uart_init(void)
void uart_init(int idx)
{
struct s5p_uart *uart = uart_platform_baseptr(0);
struct s5p_uart *uart = uart_platform_baseptr(idx);
exynos5_init_dev(uart);
}
unsigned char uart_rx_byte(void)
unsigned char uart_rx_byte(int idx)
{
struct s5p_uart *uart = uart_platform_baseptr(0);
struct s5p_uart *uart = uart_platform_baseptr(idx);
return exynos5_uart_rx_byte(uart);
}
void uart_tx_byte(unsigned char data)
void uart_tx_byte(int idx, unsigned char data)
{
struct s5p_uart *uart = uart_platform_baseptr(0);
struct s5p_uart *uart = uart_platform_baseptr(idx);
exynos5_uart_tx_byte(uart, data);
}
void uart_tx_flush(void)
void uart_tx_flush(int idx)
{
struct s5p_uart *uart = uart_platform_baseptr(0);
struct s5p_uart *uart = uart_platform_baseptr(idx);
exynos5_uart_tx_flush(uart);
}
@ -189,7 +192,7 @@ void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(0);
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = default_baudrate();
lb_add_serial(&serial, data);

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@ -90,41 +90,8 @@ config SYS_SDRAM_BASE
hex
default 0x20000000
choice CONSOLE_SERIAL_UART_CHOICES
prompt "Serial Console UART"
default CONSOLE_SERIAL_UART3
depends on CONSOLE_SERIAL
config CONSOLE_SERIAL_UART0
bool "UART0"
help
Serial console on UART0
config CONSOLE_SERIAL_UART1
bool "UART1"
help
Serial console on UART1
config CONSOLE_SERIAL_UART2
bool "UART2"
help
Serial console on UART2
config CONSOLE_SERIAL_UART3
bool "UART3"
help
Serial console on UART3
endchoice
config CONSOLE_SERIAL_UART_ADDRESS
hex
depends on CONSOLE_SERIAL
default 0x12c00000 if CONSOLE_SERIAL_UART0
default 0x12c10000 if CONSOLE_SERIAL_UART1
default 0x12c20000 if CONSOLE_SERIAL_UART2
default 0x12c30000 if CONSOLE_SERIAL_UART3
help
Map the UART names to the respective MMIO address.
config UART_FOR_CONSOLE
int
default 3
endif

View File

@ -149,28 +149,31 @@ static void exynos5_uart_tx_byte(struct s5p_uart *uart, unsigned char data)
unsigned int uart_platform_base(int idx)
{
return CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
if (idx < 4)
return 0x12c00000 + idx * 0x10000;
else
return 0;
}
void uart_init(void)
void uart_init(int idx)
{
struct s5p_uart *uart = uart_platform_baseptr(0);
struct s5p_uart *uart = uart_platform_baseptr(idx);
exynos5_init_dev(uart);
}
unsigned char uart_rx_byte(void)
unsigned char uart_rx_byte(int idx)
{
struct s5p_uart *uart = uart_platform_baseptr(0);
struct s5p_uart *uart = uart_platform_baseptr(idx);
return exynos5_uart_rx_byte(uart);
}
void uart_tx_byte(unsigned char data)
void uart_tx_byte(int idx, unsigned char data)
{
struct s5p_uart *uart = uart_platform_baseptr(0);
struct s5p_uart *uart = uart_platform_baseptr(idx);
exynos5_uart_tx_byte(uart, data);
}
void uart_tx_flush(void)
void uart_tx_flush(int idx)
{
/* Exynos5250 implements this too. */
}
@ -180,7 +183,7 @@ void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(0);
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = default_baudrate();
lb_add_serial(&serial, data);

View File

@ -16,6 +16,7 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <stdlib.h>
#include <config.h>
#include <types.h>
#include <console/uart.h>
@ -154,30 +155,36 @@ unsigned int uart_platform_refclk(void)
unsigned int uart_platform_base(int idx)
{
return CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
const unsigned int bases[] = {
0x44e09000, 0x48022000, 0x48024000,
0x481a6000, 0x481a8000, 0x481aa000
};
if (idx < ARRAY_SIZE(bases))
return bases[idx];
return 0;
}
void uart_init(void)
void uart_init(int idx)
{
struct am335x_uart *uart = uart_platform_baseptr(0);
struct am335x_uart *uart = uart_platform_baseptr(idx);
uint16_t div = (uint16_t) uart_baudrate_divisor(
default_baudrate(), uart_platform_refclk(), 16);
am335x_uart_init(uart, div);
}
unsigned char uart_rx_byte(void)
unsigned char uart_rx_byte(int idx)
{
struct am335x_uart *uart = uart_platform_baseptr(0);
struct am335x_uart *uart = uart_platform_baseptr(idx);
return am335x_uart_rx_byte(uart);
}
void uart_tx_byte(unsigned char data)
void uart_tx_byte(int idx, unsigned char data)
{
struct am335x_uart *uart = uart_platform_baseptr(0);
struct am335x_uart *uart = uart_platform_baseptr(idx);
am335x_uart_tx_byte(uart, data);
}
void uart_tx_flush(void)
void uart_tx_flush(int idx)
{
}
@ -186,7 +193,7 @@ void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(0);
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = default_baudrate();
lb_add_serial(&serial, data);

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@ -97,7 +97,7 @@ void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(0);
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = default_baudrate();
lb_add_serial(&serial, data);

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@ -21,26 +21,21 @@ static void pl011_uart_tx_byte(unsigned int *uart_base, unsigned char data)
*uart_base = (unsigned int)data;
}
unsigned int uart_platform_base(int idx)
{
return CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
}
void uart_init(void)
void uart_init(int idx)
{
}
void uart_tx_byte(unsigned char data)
void uart_tx_byte(int idx, unsigned char data)
{
unsigned int *uart_base = uart_platform_baseptr(0);
unsigned int *uart_base = uart_platform_baseptr(idx);
pl011_uart_tx_byte(uart_base, data);
}
void uart_tx_flush(void)
void uart_tx_flush(int idx)
{
}
unsigned char uart_rx_byte(void)
unsigned char uart_rx_byte(int idx)
{
return 0;
}
@ -50,7 +45,7 @@ void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(0);
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = default_baudrate();
lb_add_serial(&serial, data);

View File

@ -19,6 +19,7 @@
*/
#include <rules.h>
#include <stdlib.h>
#include <arch/io.h>
#include <console/uart.h>
#include <trace.h>
@ -102,37 +103,36 @@ static void uart8250_init(unsigned base_port, unsigned divisor)
ENABLE_TRACE;
}
/* FIXME: Needs uart index from Kconfig.
* Already use array as a work-around for ROMCC.
*/
static const unsigned bases[1] = { CONFIG_TTYS0_BASE };
static const unsigned bases[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
unsigned int uart_platform_base(int idx)
{
return bases[idx];
if (idx < ARRAY_SIZE(bases))
return bases[idx];
return 0;
}
void uart_init(void)
void uart_init(int idx)
{
unsigned int div;
div = uart_baudrate_divisor(default_baudrate(), BAUDRATE_REFCLK,
BAUDRATE_OVERSAMPLE);
uart8250_init(bases[0], div);
uart8250_init(uart_platform_base(idx), div);
}
void uart_tx_byte(unsigned char data)
void uart_tx_byte(int idx, unsigned char data)
{
uart8250_tx_byte(bases[0], data);
uart8250_tx_byte(uart_platform_base(idx), data);
}
unsigned char uart_rx_byte(void)
unsigned char uart_rx_byte(int idx)
{
return uart8250_rx_byte(bases[0]);
return uart8250_rx_byte(uart_platform_base(idx));
}
void uart_tx_flush(void)
void uart_tx_flush(int idx)
{
uart8250_tx_flush(bases[0]);
uart8250_tx_flush(uart_platform_base(idx));
}
#if ENV_RAMSTAGE
@ -140,7 +140,7 @@ void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_IO_MAPPED;
serial.baseaddr = uart_platform_base(0);
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = default_baudrate();
lb_add_serial(&serial, data);

View File

@ -89,9 +89,9 @@ static void uart8250_mem_init(unsigned base_port, unsigned divisor)
write8(base_port + UART_LCR, CONFIG_TTYS0_LCS);
}
void uart_init(void)
void uart_init(int idx)
{
u32 base = uart_platform_base(0);
u32 base = uart_platform_base(idx);
if (!base)
return;
@ -100,25 +100,25 @@ void uart_init(void)
uart8250_mem_init(base, div);
}
void uart_tx_byte(unsigned char data)
void uart_tx_byte(int idx, unsigned char data)
{
u32 base = uart_platform_base(0);
u32 base = uart_platform_base(idx);
if (!base)
return;
uart8250_mem_tx_byte(base, data);
}
unsigned char uart_rx_byte(void)
unsigned char uart_rx_byte(int idx)
{
u32 base = uart_platform_base(0);
u32 base = uart_platform_base(idx);
if (!base)
return 0xff;
return uart8250_mem_rx_byte(base);
}
void uart_tx_flush(void)
void uart_tx_flush(int idx)
{
u32 base = uart_platform_base(0);
u32 base = uart_platform_base(idx);
if (!base)
return;
uart8250_mem_tx_flush(base);

View File

@ -40,10 +40,10 @@ unsigned int uart_baudrate_divisor(unsigned int baudrate,
unsigned int refclk, unsigned int oversample);
void uart_init(void);
void uart_tx_byte(unsigned char data);
void uart_tx_flush(void);
unsigned char uart_rx_byte(void);
void uart_init(int idx);
void uart_tx_byte(int idx, unsigned char data);
void uart_tx_flush(int idx);
unsigned char uart_rx_byte(int idx);
unsigned int uart_platform_base(int idx);
@ -60,9 +60,9 @@ void oxford_remap(unsigned int new_base);
(ENV_SMM && CONFIG_DEBUG_SMI))
#if __CONSOLE_SERIAL_ENABLE__
static inline void __uart_init(void) { uart_init(); }
static inline void __uart_tx_byte(u8 data) { uart_tx_byte(data); }
static inline void __uart_tx_flush(void) { uart_tx_flush(); }
static inline void __uart_init(void) { uart_init(CONFIG_UART_FOR_CONSOLE); }
static inline void __uart_tx_byte(u8 data) { uart_tx_byte(CONFIG_UART_FOR_CONSOLE, data); }
static inline void __uart_tx_flush(void) { uart_tx_flush(CONFIG_UART_FOR_CONSOLE); }
#else
static inline void __uart_init(void) {}
static inline void __uart_tx_byte(u8 data) {}

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@ -48,11 +48,6 @@ config DRAM_SIZE_MB
int
default 1024
config CONSOLE_SERIAL_UART_ADDRESS
hex
depends on CONSOLE_SERIAL
default 0x10009000
# Memory map for qemu vexpress-a9:
#
# 0x0000_0000: jump instruction (by qemu)

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@ -21,3 +21,7 @@ ramstage-y += media.c
bootblock-y += timer.c
romstage-y += timer.c
ramstage-y += timer.c
bootblock-y += mmio.c
romstage-y += mmio.c
ramstage-y += mmio.c

View File

@ -0,0 +1,21 @@
/*
* This file is part of the coreboot project.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/uart.h>
#define VEXPRESS_UART0_IO_ADDRESS (0x10009000)
unsigned int uart_platform_base(int idx)
{
return VEXPRESS_UART0_IO_ADDRESS;
}

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@ -61,54 +61,9 @@ config CBFS_HEADER_ROM_OFFSET
hex
default 0x10
choice CONSOLE_SERIAL_UART_CHOICES
prompt "Serial Console UART"
default CONSOLE_SERIAL_UART0
depends on CONSOLE_SERIAL
config CONSOLE_SERIAL_UART0
bool "UART0"
help
Serial console on UART0
config CONSOLE_SERIAL_UART1
bool "UART1"
help
Serial console on UART1
config CONSOLE_SERIAL_UART2
bool "UART2"
help
Serial console on UART2
config CONSOLE_SERIAL_UART3
bool "UART3"
help
Serial console on UART3
config CONSOLE_SERIAL_UART4
bool "UART4"
help
Serial console on UART4
config CONSOLE_SERIAL_UART5
bool "UART5"
help
Serial console on UART5
endchoice
config CONSOLE_SERIAL_UART_ADDRESS
hex
depends on CONSOLE_SERIAL
default 0x44e09000 if CONSOLE_SERIAL_UART0
default 0x48022000 if CONSOLE_SERIAL_UART1
default 0x48024000 if CONSOLE_SERIAL_UART2
default 0x481a6000 if CONSOLE_SERIAL_UART3
default 0x481a8000 if CONSOLE_SERIAL_UART4
default 0x481aa000 if CONSOLE_SERIAL_UART5
help
Map the UART names to the respective MMIO address.
config UART_FOR_CONSOLE
int
default 0
#################################################################
# stuff from smdk5250.h #

View File

@ -42,22 +42,22 @@ void bootblock_mainboard_init(void)
setbits_le32((uint32_t *)(0x4804c000 + 0x13c), 0x5 << 21);
/* Set up the UART we're going to use */
if (CONFIG_CONSOLE_SERIAL_UART0) {
if (CONFIG_UART_FOR_CONSOLE == 0) {
am335x_pinmux_uart0();
uart_clock_ctrl = (void *)(uintptr_t)(0x44e00400 + 0xb4);
} else if (CONFIG_CONSOLE_SERIAL_UART1) {
} else if (CONFIG_UART_FOR_CONSOLE == 1) {
am335x_pinmux_uart1();
uart_clock_ctrl = (void *)(uintptr_t)(0x44e00000 + 0x6c);
} else if (CONFIG_CONSOLE_SERIAL_UART2) {
} else if (CONFIG_UART_FOR_CONSOLE == 2) {
am335x_pinmux_uart2();
uart_clock_ctrl = (void *)(uintptr_t)(0x44e00000 + 0x70);
} else if (CONFIG_CONSOLE_SERIAL_UART3) {
} else if (CONFIG_UART_FOR_CONSOLE == 3) {
am335x_pinmux_uart3();
uart_clock_ctrl = (void *)(uintptr_t)(0x44e00000 + 0x74);
} else if (CONFIG_CONSOLE_SERIAL_UART4) {
} else if (CONFIG_UART_FOR_CONSOLE == 4) {
am335x_pinmux_uart4();
uart_clock_ctrl = (void *)(uintptr_t)(0x44e00000 + 0x78);
} else if (CONFIG_CONSOLE_SERIAL_UART5) {
} else if (CONFIG_UART_FOR_CONSOLE == 5) {
am335x_pinmux_uart5();
uart_clock_ctrl = (void *)(uintptr_t)(0x44e00000 + 0x38);
}