From 707e5452e7037bfc918862901401608469d2e86a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Thu, 10 Feb 2022 07:13:29 +0200 Subject: [PATCH] cpu/x86/lapic: Fix SMP=n case with LEGACY_SMP_INIT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix regression after commit 9ec7227c9b cpu/x86/lapic: Move LAPIC configuration to MP init The call to disable_lapic() got removed and with asus/p2b SeaBIOS payload was unable to load kernel. The combination of entering SeaBIOS payload with an enabled lapic but not having programmed LAPIC_LVT0 for DELIVERY_MODE_EXTINT apparently disconnects i8259 PIC interrupt delivery pin. Change-Id: If51e5d65153a02ac7af191e7897c04bd4e298006 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/61793 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Elyes Haouas Reviewed-by: Paul Menzel --- src/cpu/x86/lapic/lapic_cpu_init.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c index 837d32f3b6..2cb84594e9 100644 --- a/src/cpu/x86/lapic/lapic_cpu_init.c +++ b/src/cpu/x86/lapic/lapic_cpu_init.c @@ -384,6 +384,8 @@ void initialize_cpus(struct bus *cpu_bus) if (is_smp_boot()) { enable_lapic(); setup_lapic_interrupts(); + } else { + disable_lapic(); } /* Get the device path of the boot CPU */