Clean up vt8235_early_smbus a bit.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2038 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -30,31 +30,24 @@ static void enable_smbus(void)
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device_t dev;
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device_t dev;
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unsigned char c;
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unsigned char c;
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int i;
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int i;
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/* Power management controller */
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/* Power management controller */
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dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235), 0);
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dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
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PCI_DEVICE_ID_VIA_8235), 0);
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if (dev == PCI_DEV_INVALID) {
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if (dev == PCI_DEV_INVALID) {
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die("SMBUS controller not found\r\n");
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die("SMBUS controller not found\r\n");
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}
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}
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pci_write_config8(dev, 0xd2, (0x4 << 1 ));
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// set IO base address to SMBUS_IO_BASE
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// set IO base address to SMBUS_IO_BASE
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pci_write_config16(dev, 0xd0, SMBUS_IO_BASE);
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pci_write_config16(dev, 0xd0, SMBUS_IO_BASE | 1);
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// Enable SMBus
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// Enable SMBus
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pci_write_config8(dev, 0xd2, (0x4 << 1)|1);
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pci_write_config8(dev, 0xd2, (0x4 << 1) | 1);
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// Enable RTC
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pci_write_config8(dev,0x51,0x04);
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/* make it work for I/O ...
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/* make it work for I/O ...
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*/
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*/
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pci_write_config16(dev, 4, 1);
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pci_write_config16(dev, 4, 1);
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/* tell the world we're alive - make power led flash during bios execution */
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pci_write_config8(dev,0x94,0xb2);
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/* FIX for half baud rate problem */
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/* FIX for half baud rate problem */
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/* let clocks and the like settle */
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/* let clocks and the like settle */
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@ -62,28 +55,17 @@ static void enable_smbus(void)
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for(i = 0 ; i < 5000 ; i++)
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for(i = 0 ; i < 5000 ; i++)
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outb(0x80,0x80);
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outb(0x80,0x80);
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/* southbridge doesn't seem to like to do much untill after this delay, so set up
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/*
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* the flashing power LED again */
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* The VT1211 serial port needs 48 mhz clock, on power up it is getting
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pci_write_config8(dev,0x94,0xb2);
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* only 24 mhz, there is some mysterious device on the smbus that can
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* fix this...this code below does it.
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/* The VT1211 serial port needs 48 mhz clock, on power up it is getting
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* */
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only 24 mhz, there is some mysterious device on the smbus that can
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fix this...this code below does it. */
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outb(0xff, SMBUS_IO_BASE+SMBHSTSTAT);
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outb(0xff, SMBUS_IO_BASE+SMBHSTSTAT);
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outb(0xff, SMBUS_IO_BASE+SMBHSTSTAT);
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outb(0xff, SMBUS_IO_BASE+SMBHSTSTAT);
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outb(0xff, SMBUS_IO_BASE+SMBHSTSTAT);
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for( ;;) {
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c = inb(SMBUS_IO_BASE+SMBHSTSTAT);
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if ((c & 1) == 0)
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break;
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}
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outb(0x7f, SMBUS_IO_BASE+SMBHSTDAT0);
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outb(0x7f, SMBUS_IO_BASE+SMBHSTDAT0);
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outb(0x83, SMBUS_IO_BASE+SMBHSTCMD);
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outb(0x83, SMBUS_IO_BASE+SMBHSTCMD);
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outb(CLOCK_SLAVE_ADDRESS<<1 , SMBUS_IO_BASE+SMBXMITADD);
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outb(CLOCK_SLAVE_ADDRESS<<1 , SMBUS_IO_BASE+SMBXMITADD);
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outb(8 | I2C_TRANS_CMD, SMBUS_IO_BASE+SMBHSTCTL);
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outb(8 | I2C_TRANS_CMD, SMBUS_IO_BASE+SMBHSTCTL);
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for (;;) {
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for (;;) {
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c = inb(SMBUS_IO_BASE+SMBHSTSTAT);
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c = inb(SMBUS_IO_BASE+SMBHSTSTAT);
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if ((c & 1) == 0)
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if ((c & 1) == 0)
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