From 70b517ee5791fb4c5136231304f8cf1d734c66a9 Mon Sep 17 00:00:00 2001 From: Kane Chen Date: Thu, 5 Oct 2023 14:03:53 +0800 Subject: [PATCH] soc/intel/meteorlake: Reserve IOE P2SB MMIO correctly The original code only reserves IOM mmio, but there is other asl code that requires to program ioe p2sb mmio such as IOE PCIE clk request control. See \_SB.ECLK.CLKD in src/soc/intel/common/acpi/pcie_clk.asl TEST=as before: suspend_stress_test 50 cycle pass, type-c display OK on screebo Change-Id: Ie55f7975277b390f776e44596c42e426ba9cd235 Signed-off-by: Kane Chen Reviewed-on: https://review.coreboot.org/c/coreboot/+/78252 Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai --- src/soc/intel/meteorlake/p2sb.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/intel/meteorlake/p2sb.c b/src/soc/intel/meteorlake/p2sb.c index ae9b9a403c..5863cf0fd7 100644 --- a/src/soc/intel/meteorlake/p2sb.c +++ b/src/soc/intel/meteorlake/p2sb.c @@ -34,8 +34,8 @@ void p2sb_soc_get_sb_mask(uint32_t *ep_mask, size_t count) static void ioe_p2sb_read_resources(struct device *dev) { - /* Add the fixed MMIO resource for IOM */ - mmio_range(dev, PCI_BASE_ADDRESS_0, IOM_BASE_ADDR, IOM_BASE_SIZE); + /* Add the fixed MMIO resource for IOE P2SB */ + mmio_range(dev, PCI_BASE_ADDRESS_0, IOE_P2SB_BAR, IOE_P2SB_SIZE); } static void p2sb_read_resources(struct device *dev)