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soc/intel/xeon_sp/cpx: Don't use SCI define 

Continue preparations for common ACPI code.
Add code from skx and common/acpi to check the SCI register
instead of using a define.

Change-Id: I6b638d28775320894a6ab24ef486e67c181591eb
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45844
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Marc Jones 2020-09-28 12:25:03 -06:00 committed by Marc Jones
parent ccfaf253b5
commit 70ddbd8ce1
2 changed files with 44 additions and 3 deletions
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37
src/soc/intel/xeon_sp/cpx/acpi.c
View File

@ -25,11 +25,41 @@
#include "chip.h" #include "chip.h"
#define SCI_INT_NUM 9 static int acpi_sci_irq(void)
{
int sci_irq = 9;
uint32_t scis;
scis = soc_read_sci_irq_select();
scis &= SCI_IRQ_SEL;
scis >>= SCI_IRQ_ADJUST;
/* Determine how SCI is routed. */
switch (scis) {
case SCIS_IRQ9:
case SCIS_IRQ10:
case SCIS_IRQ11:
sci_irq = scis - SCIS_IRQ9 + 9;
break;
case SCIS_IRQ20:
case SCIS_IRQ21:
case SCIS_IRQ22:
case SCIS_IRQ23:
sci_irq = scis - SCIS_IRQ20 + 20;
break;
default:
printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n");
sci_irq = 9;
break;
}
printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq);
return sci_irq;
}
static unsigned long acpi_madt_irq_overrides(unsigned long current) static unsigned long acpi_madt_irq_overrides(unsigned long current)
{ {
int sci = SCI_INT_NUM; int sci = acpi_sci_irq();
uint16_t flags = MP_IRQ_TRIGGER_LEVEL; uint16_t flags = MP_IRQ_TRIGGER_LEVEL;
/* INT_SRC_OVR */ /* INT_SRC_OVR */
@ -103,7 +133,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
const uint16_t pmbase = ACPI_BASE_ADDRESS; const uint16_t pmbase = ACPI_BASE_ADDRESS;
fadt->header.revision = get_acpi_table_revision(FADT); fadt->header.revision = get_acpi_table_revision(FADT);
fadt->sci_int = SCI_INT_NUM;
fadt->sci_int = acpi_sci_irq();
fadt->pm1a_evt_blk = pmbase + PM1_STS; fadt->pm1a_evt_blk = pmbase + PM1_STS;
fadt->pm1a_cnt_blk = pmbase + PM1_CNT; fadt->pm1a_cnt_blk = pmbase + PM1_CNT;

10
src/soc/intel/xeon_sp/cpx/soc_acpi.c
View File

@ -42,6 +42,16 @@ int soc_madt_sci_irq_polarity(int sci)
return MP_IRQ_POLARITY_HIGH; return MP_IRQ_POLARITY_HIGH;
} }
uint32_t soc_read_sci_irq_select(void)
{
struct device *dev = PCH_DEV_PMC;
if (!dev)
return 0;
return pci_read_config32(dev, PMC_ACPI_CNT);
}
/* /*
* Currently called in southbridge_inject_dsdt(). Change to soc_southbridge_inject_dsdt() * Currently called in southbridge_inject_dsdt(). Change to soc_southbridge_inject_dsdt()
* with a call from the common/function or find another way to call this at the correct place * with a call from the common/function or find another way to call this at the correct place