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vx900: decode the whole ROM 

Fixes supports for flash ROMs larger than 512K, such as the 1M one in
HP t5550 Thin Client.

Change-Id: I4d6287e130809c33dfbd40bce7913a95b4b3a9c7
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/22262
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Lubomir Rintel 2017-10-31 10:02:27 +01:00 committed by Martin Roth
parent 7332455a88
commit 71053a9f39
2 changed files with 50 additions and 0 deletions
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4
src/northbridge/via/vx900/Kconfig
View File

@ -41,4 +41,8 @@ config VGA_BIOS_ID
string
default "1106,7122"
config BOOTBLOCK_NORTHBRIDGE_INIT
string
default "northbridge/via/vx900/bootblock.c"
endif

46
src/northbridge/via/vx900/bootblock.c Normal file
View File

@ -0,0 +1,46 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2017 Lubomir Rintel <lkundrak@v3.sk>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/io.h>
#if CONFIG_ROM_SIZE == 0x80000
# define ROM_DECODE_MAP 0x00
#elif CONFIG_ROM_SIZE == 0x100000
# define ROM_DECODE_MAP 0x40
#elif CONFIG_ROM_SIZE == 0x180000
# define ROM_DECODE_MAP 0x60
#elif CONFIG_ROM_SIZE == 0x200000
# define ROM_DECODE_MAP 0x70
#elif CONFIG_ROM_SIZE == 0x280000
# define ROM_DECODE_MAP 0x78
#elif CONFIG_ROM_SIZE == 0x300000
# define ROM_DECODE_MAP 0x7c
#elif CONFIG_ROM_SIZE == 0x380000
# define ROM_DECODE_MAP 0x7e
#elif CONFIG_ROM_SIZE == 0x400000
# define ROM_DECODE_MAP 0x7f
#else
# error "Bad CONFIG_ROM_SIZE"
#endif
static void bootblock_northbridge_init(void)
{
u8 reg;
pci_io_read_config8(PCI_DEV(0, 0x11, 0), 0x41);
reg |= ROM_DECODE_MAP;
pci_io_write_config8(PCI_DEV(0, 0x11, 0), 0x41, reg);
}