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mb/google/brya/var/omnigul: Add usb_lpm_incapable for DB Type-C port 

Intel ADL-P USB Type-C ports are not compatible with Parade PS8815
retimer on USB U1/U2 transition. The usb_lpm_incapable config is
used to disable USB U1/U2 transition for these Type-C ports.

BUG=b:277149723
BRANCH=firmware-brya-14505.B
TEST=Plug in device and check LPM sysfs nodes are disabled
localhost ~ # cat /sys/bus/usb/devices/2-3/power/usb3_hardware_lpm_u1
disabled
localhost ~ # cat /sys/bus/usb/devices/2-3/power/usb3_hardware_lpm_u2
disabled

Change-Id: I618cd09f45ede0a76cf46b3e467ba87775dd5d9d
Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74246
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ron Lee <ron.lee@intel.com>
Reviewed-by: Derek Huang <derekhuang@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Dtrain Hsu 2023-04-06 11:00:08 +08:00 committed by Subrata Banik
parent 132a3ab1a7
commit 7143e96f65
1 changed files with 1 additions and 0 deletions
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src/mainboard/google/brya/variants/omnigul/overridetree.cb
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@ -336,6 +336,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true" register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))" register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port3 on end device ref tcss_usb3_port3 on end
end end
end end