AMD fam10 ACPI: Use common fixed sleepstates.asl
SSFG was meant to be used as a mask to enable sleepstates _S1 thru _S4. However as a logical instead of bitwise 'and' operation was used, all the states were enabled if only one was marked available. Note that all boards incorrectly had SSFG == 0x0D that previously enabled ACPI S3 sleep state even when it was not available. Change-Id: Ia948becff079383cbf861468da9e8a3ebbf213cb Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21093 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
This commit is contained in:
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390ba044dc
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714709fde6
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@ -35,8 +35,6 @@ DefinitionBlock (
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Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
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Name(HPBA, 0xFED00000) /* Base address of HPET table */
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Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
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/* USB overcurrent mapping pins. */
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Name(UOM0, 0)
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Name(UOM1, 2)
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@ -796,27 +794,7 @@ DefinitionBlock (
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} /* End Scope(_SB) */
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/* Supported sleep states: */
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Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
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If (LAnd(SSFG, 0x01)) {
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Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
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}
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If (LAnd(SSFG, 0x02)) {
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Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
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}
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If (LAnd(SSFG, 0x04)) {
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Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
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}
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If (LAnd(SSFG, 0x08)) {
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Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
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}
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Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
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Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
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Name(CSMS, 0) /* Current System State */
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#include <southbridge/amd/common/acpi/sleepstates.asl>
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/* Wake status package */
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Name(WKST,Package(){Zero, Zero})
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@ -35,8 +35,6 @@ DefinitionBlock (
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Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
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Name(HPBA, 0xFED00000) /* Base address of HPET table */
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Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
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/* USB overcurrent mapping pins. */
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Name(UOM0, 0)
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Name(UOM1, 2)
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@ -796,27 +794,7 @@ DefinitionBlock (
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} /* End Scope(_SB) */
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/* Supported sleep states: */
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Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
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If (LAnd(SSFG, 0x01)) {
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Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
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}
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If (LAnd(SSFG, 0x02)) {
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Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
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}
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If (LAnd(SSFG, 0x04)) {
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Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
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}
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If (LAnd(SSFG, 0x08)) {
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Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
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}
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Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
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Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
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Name(CSMS, 0) /* Current System State */
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#include <southbridge/amd/common/acpi/sleepstates.asl>
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/* Wake status package */
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Name(WKST,Package(){Zero, Zero})
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@ -36,8 +36,6 @@ DefinitionBlock (
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Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
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Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
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/* USB overcurrent mapping pins. */
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Name(UOM0, 0)
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Name(UOM1, 2)
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@ -763,27 +761,7 @@ DefinitionBlock (
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} /* End Scope(_SB) */
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/* Supported sleep states: */
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Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
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If (LAnd(SSFG, 0x01)) {
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Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
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}
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If (LAnd(SSFG, 0x02)) {
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Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
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}
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If (LAnd(SSFG, 0x04)) {
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Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
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}
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If (LAnd(SSFG, 0x08)) {
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Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
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}
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Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
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Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
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Name(CSMS, 0) /* Current System State */
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#include <southbridge/amd/common/acpi/sleepstates.asl>
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/* Wake status package */
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Name(WKST,Package(){Zero, Zero})
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@ -35,8 +35,6 @@ DefinitionBlock (
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Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
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Name(HPBA, 0xFED00000) /* Base address of HPET table */
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Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
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/* USB overcurrent mapping pins. */
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Name(UOM0, 0)
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Name(UOM1, 2)
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@ -759,27 +757,7 @@ DefinitionBlock (
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} /* End Scope(_SB) */
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/* Supported sleep states: */
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Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
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If (LAnd(SSFG, 0x01)) {
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Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
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}
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If (LAnd(SSFG, 0x02)) {
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Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
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}
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If (LAnd(SSFG, 0x04)) {
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Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
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}
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If (LAnd(SSFG, 0x08)) {
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Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
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}
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Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
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Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
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Name(CSMS, 0) /* Current System State */
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#include <southbridge/amd/common/acpi/sleepstates.asl>
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/* Wake status package */
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Name(WKST,Package(){Zero, Zero})
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@ -35,8 +35,6 @@ DefinitionBlock (
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Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */
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Name(HPBA, 0xFED00000) /* Base address of HPET table */
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Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
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/* USB overcurrent mapping pins. */
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Name(UOM0, 0)
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Name(UOM1, 2)
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@ -801,27 +799,7 @@ DefinitionBlock (
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} /* End Scope(_SB) */
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/* Supported sleep states: */
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Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
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If (LAnd(SSFG, 0x01)) {
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Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
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}
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If (LAnd(SSFG, 0x02)) {
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Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
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}
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If (LAnd(SSFG, 0x04)) {
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Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
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}
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If (LAnd(SSFG, 0x08)) {
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Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
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}
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Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
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Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
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Name(CSMS, 0) /* Current System State */
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#include <southbridge/amd/common/acpi/sleepstates.asl>
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/* Wake status package */
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Name(WKST,Package(){Zero, Zero})
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@ -36,8 +36,6 @@ DefinitionBlock (
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Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
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Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
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/* USB overcurrent mapping pins. */
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Name(UOM0, 0)
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Name(UOM1, 2)
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@ -763,27 +761,7 @@ DefinitionBlock (
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} /* End Scope(_SB) */
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/* Supported sleep states: */
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Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
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If (LAnd(SSFG, 0x01)) {
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Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
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}
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If (LAnd(SSFG, 0x02)) {
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Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
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}
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If (LAnd(SSFG, 0x04)) {
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Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
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}
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If (LAnd(SSFG, 0x08)) {
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Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
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}
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Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
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Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
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Name(CSMS, 0) /* Current System State */
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#include <southbridge/amd/common/acpi/sleepstates.asl>
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/* Wake status package */
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Name(WKST,Package(){Zero, Zero})
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@ -35,8 +35,6 @@ DefinitionBlock (
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Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
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Name(HPBA, 0xFED00000) /* Base address of HPET table */
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Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
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/* USB overcurrent mapping pins. */
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Name(UOM0, 0)
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Name(UOM1, 2)
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@ -801,27 +799,7 @@ DefinitionBlock (
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} /* End Scope(_SB) */
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/* Supported sleep states: */
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Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
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If (LAnd(SSFG, 0x01)) {
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Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
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}
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If (LAnd(SSFG, 0x02)) {
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Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
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}
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If (LAnd(SSFG, 0x04)) {
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Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
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}
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If (LAnd(SSFG, 0x08)) {
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Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
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}
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Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
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Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
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Name(CSMS, 0) /* Current System State */
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#include <southbridge/amd/common/acpi/sleepstates.asl>
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/* Wake status package */
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Name(WKST,Package(){Zero, Zero})
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@ -28,8 +28,6 @@ DefinitionBlock (
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Name(HPBA, 0xFED00000) /* Base address of HPET table */
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Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
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Name(PMOD, One) /* Assume APIC */
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/* PIC IRQ mapping registers, C00h-C01h */
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@ -428,27 +426,7 @@ DefinitionBlock (
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} /* End Scope(_SB) */
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/* Supported sleep states: */
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Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
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If (LAnd(SSFG, 0x01)) {
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Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
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}
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If (LAnd(SSFG, 0x02)) {
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Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
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}
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If (LAnd(SSFG, 0x04)) {
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Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
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}
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If (LAnd(SSFG, 0x08)) {
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Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
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}
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Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
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Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
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Name(CSMS, 0) /* Current System State */
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#include <southbridge/amd/common/acpi/sleepstates.asl>
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/* Wake status package */
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@ -50,13 +50,6 @@ DefinitionBlock (
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/* HPET enable */
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Name (HPTE, 0x1)
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/* Define power states */
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Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 }) /* Normal operation */
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Name (\_S1, Package () { 0x01, 0x01, 0x00, 0x00 }) /* Standby */
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Name (\_S3, Package () { 0x03, 0x03, 0x00, 0x00 }) /* Suspend to RAM */
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Name (\_S4, Package () { 0x04, 0x04, 0x00, 0x00 }) /* Suspend to disk */
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Name (\_S5, Package () { 0x05, 0x05, 0x00, 0x00 }) /* Hard power off */
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/* The _PIC method is called by the OS to choose between interrupt
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* routing via the i8259 interrupt controller or the APIC.
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*
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@ -50,13 +50,6 @@ DefinitionBlock (
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/* HPET enable */
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Name (HPTE, 0x1)
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/* Define power states */
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Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 }) /* Normal operation */
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Name (\_S1, Package () { 0x01, 0x01, 0x00, 0x00 }) /* Standby */
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Name (\_S3, Package () { 0x03, 0x03, 0x00, 0x00 }) /* Suspend to RAM */
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Name (\_S4, Package () { 0x04, 0x04, 0x00, 0x00 }) /* Suspend to disk */
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Name (\_S5, Package () { 0x05, 0x05, 0x00, 0x00 }) /* Hard power off */
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/* The _PIC method is called by the OS to choose between interrupt
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* routing via the i8259 interrupt controller or the APIC.
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*
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@ -35,8 +35,6 @@ DefinitionBlock (
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Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
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Name(HPBA, 0xFED00000) /* Base address of HPET table */
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Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
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/* USB overcurrent mapping pins. */
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Name(UOM0, 0)
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Name(UOM1, 2)
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@ -801,27 +799,7 @@ DefinitionBlock (
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} /* End Scope(_SB) */
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/* Supported sleep states: */
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Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
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If (LAnd(SSFG, 0x01)) {
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Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
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}
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If (LAnd(SSFG, 0x02)) {
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Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
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}
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If (LAnd(SSFG, 0x04)) {
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Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
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}
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If (LAnd(SSFG, 0x08)) {
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Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
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}
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Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
|
||||
|
||||
Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
|
||||
Name(CSMS, 0) /* Current System State */
|
||||
#include <southbridge/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Wake status package */
|
||||
Name(WKST,Package(){Zero, Zero})
|
||||
|
|
|
@ -35,8 +35,6 @@ DefinitionBlock (
|
|||
Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
|
||||
Name(HPBA, 0xFED00000) /* Base address of HPET table */
|
||||
|
||||
Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
|
||||
|
||||
/* USB overcurrent mapping pins. */
|
||||
Name(UOM0, 0)
|
||||
Name(UOM1, 2)
|
||||
|
@ -801,27 +799,7 @@ DefinitionBlock (
|
|||
|
||||
} /* End Scope(_SB) */
|
||||
|
||||
|
||||
/* Supported sleep states: */
|
||||
Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
|
||||
|
||||
If (LAnd(SSFG, 0x01)) {
|
||||
Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
|
||||
}
|
||||
If (LAnd(SSFG, 0x02)) {
|
||||
Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x04)) {
|
||||
Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x08)) {
|
||||
Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
|
||||
}
|
||||
|
||||
Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
|
||||
|
||||
Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
|
||||
Name(CSMS, 0) /* Current System State */
|
||||
#include <southbridge/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Wake status package */
|
||||
Name(WKST,Package(){Zero, Zero})
|
||||
|
|
|
@ -35,8 +35,6 @@ DefinitionBlock (
|
|||
Name(PCBA,CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */
|
||||
Name(HPBA, 0xFED00000) /* Base address of HPET table */
|
||||
|
||||
Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
|
||||
|
||||
/* USB overcurrent mapping pins. */
|
||||
Name(UOM0, 0)
|
||||
Name(UOM1, 2)
|
||||
|
@ -801,27 +799,7 @@ DefinitionBlock (
|
|||
|
||||
} /* End Scope(_SB) */
|
||||
|
||||
|
||||
/* Supported sleep states: */
|
||||
Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
|
||||
|
||||
If (LAnd(SSFG, 0x01)) {
|
||||
Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
|
||||
}
|
||||
If (LAnd(SSFG, 0x02)) {
|
||||
Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x04)) {
|
||||
Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x08)) {
|
||||
Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
|
||||
}
|
||||
|
||||
Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
|
||||
|
||||
Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
|
||||
Name(CSMS, 0) /* Current System State */
|
||||
#include <southbridge/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Wake status package */
|
||||
Name(WKST,Package(){Zero, Zero})
|
||||
|
|
|
@ -35,8 +35,6 @@ DefinitionBlock (
|
|||
Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
|
||||
Name(HPBA, 0xFED00000) /* Base address of HPET table */
|
||||
|
||||
Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
|
||||
|
||||
/* USB overcurrent mapping pins. */
|
||||
Name(UOM0, 0)
|
||||
Name(UOM1, 2)
|
||||
|
@ -796,27 +794,7 @@ DefinitionBlock (
|
|||
|
||||
} /* End Scope(_SB) */
|
||||
|
||||
|
||||
/* Supported sleep states: */
|
||||
Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
|
||||
|
||||
If (LAnd(SSFG, 0x01)) {
|
||||
Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
|
||||
}
|
||||
If (LAnd(SSFG, 0x02)) {
|
||||
Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x04)) {
|
||||
Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x08)) {
|
||||
Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
|
||||
}
|
||||
|
||||
Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
|
||||
|
||||
Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
|
||||
Name(CSMS, 0) /* Current System State */
|
||||
#include <southbridge/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Wake status package */
|
||||
Name(WKST,Package(){Zero, Zero})
|
||||
|
|
|
@ -35,8 +35,6 @@ DefinitionBlock (
|
|||
Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
|
||||
Name(HPBA, 0xFED00000) /* Base address of HPET table */
|
||||
|
||||
Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
|
||||
|
||||
/* USB overcurrent mapping pins. */
|
||||
Name(UOM0, 0)
|
||||
Name(UOM1, 2)
|
||||
|
@ -796,27 +794,7 @@ DefinitionBlock (
|
|||
|
||||
} /* End Scope(_SB) */
|
||||
|
||||
|
||||
/* Supported sleep states: */
|
||||
Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
|
||||
|
||||
If (LAnd(SSFG, 0x01)) {
|
||||
Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
|
||||
}
|
||||
If (LAnd(SSFG, 0x02)) {
|
||||
Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x04)) {
|
||||
Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x08)) {
|
||||
Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
|
||||
}
|
||||
|
||||
Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
|
||||
|
||||
Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
|
||||
Name(CSMS, 0) /* Current System State */
|
||||
#include <southbridge/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Wake status package */
|
||||
Name(WKST,Package(){Zero, Zero})
|
||||
|
|
|
@ -35,8 +35,6 @@ DefinitionBlock (
|
|||
Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
|
||||
Name(HPBA, 0xFED00000) /* Base address of HPET table */
|
||||
|
||||
Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
|
||||
|
||||
/* USB overcurrent mapping pins. */
|
||||
Name(UOM0, 0)
|
||||
Name(UOM1, 2)
|
||||
|
@ -801,27 +799,7 @@ DefinitionBlock (
|
|||
|
||||
} /* End Scope(_SB) */
|
||||
|
||||
|
||||
/* Supported sleep states: */
|
||||
Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
|
||||
|
||||
If (LAnd(SSFG, 0x01)) {
|
||||
Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
|
||||
}
|
||||
If (LAnd(SSFG, 0x02)) {
|
||||
Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x04)) {
|
||||
Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x08)) {
|
||||
Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
|
||||
}
|
||||
|
||||
Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
|
||||
|
||||
Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
|
||||
Name(CSMS, 0) /* Current System State */
|
||||
#include <southbridge/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Wake status package */
|
||||
Name(WKST,Package(){Zero, Zero})
|
||||
|
|
|
@ -35,8 +35,6 @@ DefinitionBlock (
|
|||
Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
|
||||
Name(HPBA, 0xFED00000) /* Base address of HPET table */
|
||||
|
||||
Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
|
||||
|
||||
/* USB overcurrent mapping pins. */
|
||||
Name(UOM0, 0)
|
||||
Name(UOM1, 2)
|
||||
|
@ -801,27 +799,7 @@ DefinitionBlock (
|
|||
|
||||
} /* End Scope(_SB) */
|
||||
|
||||
|
||||
/* Supported sleep states: */
|
||||
Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
|
||||
|
||||
If (LAnd(SSFG, 0x01)) {
|
||||
Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
|
||||
}
|
||||
If (LAnd(SSFG, 0x02)) {
|
||||
Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x04)) {
|
||||
Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x08)) {
|
||||
Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
|
||||
}
|
||||
|
||||
Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
|
||||
|
||||
Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
|
||||
Name(CSMS, 0) /* Current System State */
|
||||
#include <southbridge/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Wake status package */
|
||||
Name(WKST,Package(){Zero, Zero})
|
||||
|
|
|
@ -35,8 +35,6 @@ DefinitionBlock (
|
|||
Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
|
||||
Name(HPBA, 0xFED00000) /* Base address of HPET table */
|
||||
|
||||
Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
|
||||
|
||||
/* USB overcurrent mapping pins. */
|
||||
Name(UOM0, 0)
|
||||
Name(UOM1, 2)
|
||||
|
@ -801,27 +799,7 @@ DefinitionBlock (
|
|||
|
||||
} /* End Scope(_SB) */
|
||||
|
||||
|
||||
/* Supported sleep states: */
|
||||
Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
|
||||
|
||||
If (LAnd(SSFG, 0x01)) {
|
||||
Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
|
||||
}
|
||||
If (LAnd(SSFG, 0x02)) {
|
||||
Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x04)) {
|
||||
Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x08)) {
|
||||
Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
|
||||
}
|
||||
|
||||
Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
|
||||
|
||||
Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
|
||||
Name(CSMS, 0) /* Current System State */
|
||||
#include <southbridge/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Wake status package */
|
||||
Name(WKST,Package(){Zero, Zero})
|
||||
|
|
|
@ -35,8 +35,6 @@ DefinitionBlock (
|
|||
Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */
|
||||
Name(HPBA, 0xFED00000) /* Base address of HPET table */
|
||||
|
||||
Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
|
||||
|
||||
/* USB overcurrent mapping pins. */
|
||||
Name(UOM0, 0)
|
||||
Name(UOM1, 2)
|
||||
|
@ -801,27 +799,7 @@ DefinitionBlock (
|
|||
|
||||
} /* End Scope(_SB) */
|
||||
|
||||
|
||||
/* Supported sleep states: */
|
||||
Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
|
||||
|
||||
If (LAnd(SSFG, 0x01)) {
|
||||
Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
|
||||
}
|
||||
If (LAnd(SSFG, 0x02)) {
|
||||
Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x04)) {
|
||||
Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x08)) {
|
||||
Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
|
||||
}
|
||||
|
||||
Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
|
||||
|
||||
Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
|
||||
Name(CSMS, 0) /* Current System State */
|
||||
#include <southbridge/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Wake status package */
|
||||
Name(WKST,Package(){Zero, Zero})
|
||||
|
|
|
@ -35,8 +35,6 @@ DefinitionBlock (
|
|||
Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
|
||||
Name(HPBA, 0xFED00000) /* Base address of HPET table */
|
||||
|
||||
Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
|
||||
|
||||
/* USB overcurrent mapping pins. */
|
||||
Name(UOM0, 0)
|
||||
Name(UOM1, 2)
|
||||
|
@ -801,27 +799,7 @@ DefinitionBlock (
|
|||
|
||||
} /* End Scope(_SB) */
|
||||
|
||||
|
||||
/* Supported sleep states: */
|
||||
Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
|
||||
|
||||
If (LAnd(SSFG, 0x01)) {
|
||||
Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
|
||||
}
|
||||
If (LAnd(SSFG, 0x02)) {
|
||||
Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x04)) {
|
||||
Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x08)) {
|
||||
Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
|
||||
}
|
||||
|
||||
Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
|
||||
|
||||
Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
|
||||
Name(CSMS, 0) /* Current System State */
|
||||
#include <southbridge/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Wake status package */
|
||||
Name(WKST,Package(){Zero, Zero})
|
||||
|
|
|
@ -36,8 +36,6 @@ DefinitionBlock (
|
|||
|
||||
Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
|
||||
|
||||
Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
|
||||
|
||||
/* USB overcurrent mapping pins. */
|
||||
Name(UOM0, 0)
|
||||
Name(UOM1, 2)
|
||||
|
@ -763,27 +761,7 @@ DefinitionBlock (
|
|||
|
||||
} /* End Scope(_SB) */
|
||||
|
||||
|
||||
/* Supported sleep states: */
|
||||
Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
|
||||
|
||||
If (LAnd(SSFG, 0x01)) {
|
||||
Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
|
||||
}
|
||||
If (LAnd(SSFG, 0x02)) {
|
||||
Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x04)) {
|
||||
Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x08)) {
|
||||
Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
|
||||
}
|
||||
|
||||
Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
|
||||
|
||||
Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
|
||||
Name(CSMS, 0) /* Current System State */
|
||||
#include <southbridge/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Wake status package */
|
||||
Name(WKST,Package(){Zero, Zero})
|
||||
|
|
|
@ -15,16 +15,7 @@
|
|||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/* Supported sleep states: */
|
||||
Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
|
||||
Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
|
||||
Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
|
||||
Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
|
||||
Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
|
||||
Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
|
||||
|
||||
Name(\_SB.CSPS ,0) /* Current Sleep State (S0, ... , S5) */
|
||||
Name(CSMS, 0) /* Current System State */
|
||||
#include <southbridge/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Wake status package */
|
||||
Name(WKST,Package(){Zero, Zero})
|
||||
|
|
|
@ -35,8 +35,6 @@ DefinitionBlock (
|
|||
Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
|
||||
Name(HPBA, 0xFED00000) /* Base address of HPET table */
|
||||
|
||||
Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
|
||||
|
||||
/* USB overcurrent mapping pins. */
|
||||
Name(UOM0, 0)
|
||||
Name(UOM1, 2)
|
||||
|
@ -819,27 +817,7 @@ DefinitionBlock (
|
|||
|
||||
} /* End Scope(_SB) */
|
||||
|
||||
|
||||
/* Supported sleep states: */
|
||||
Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
|
||||
|
||||
If (LAnd(SSFG, 0x01)) {
|
||||
Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
|
||||
}
|
||||
If (LAnd(SSFG, 0x02)) {
|
||||
Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x04)) {
|
||||
Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x08)) {
|
||||
Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
|
||||
}
|
||||
|
||||
Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
|
||||
|
||||
Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
|
||||
Name(CSMS, 0) /* Current System State */
|
||||
#include <southbridge/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Wake status package */
|
||||
Name(WKST,Package(){Zero, Zero})
|
||||
|
|
|
@ -36,8 +36,6 @@ DefinitionBlock (
|
|||
|
||||
Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
|
||||
|
||||
Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
|
||||
|
||||
/* USB overcurrent mapping pins. */
|
||||
Name(UOM0, 0)
|
||||
Name(UOM1, 2)
|
||||
|
@ -763,27 +761,7 @@ DefinitionBlock (
|
|||
|
||||
} /* End Scope(_SB) */
|
||||
|
||||
|
||||
/* Supported sleep states: */
|
||||
Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
|
||||
|
||||
If (LAnd(SSFG, 0x01)) {
|
||||
Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
|
||||
}
|
||||
If (LAnd(SSFG, 0x02)) {
|
||||
Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x04)) {
|
||||
Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x08)) {
|
||||
Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
|
||||
}
|
||||
|
||||
Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
|
||||
|
||||
Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
|
||||
Name(CSMS, 0) /* Current System State */
|
||||
#include <southbridge/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Wake status package */
|
||||
Name(WKST,Package(){Zero, Zero})
|
||||
|
|
|
@ -36,8 +36,6 @@ DefinitionBlock (
|
|||
|
||||
Name(PCBA, 0xE0000000) /* Base address of PCIe config space */
|
||||
|
||||
Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
|
||||
|
||||
/* USB overcurrent mapping pins. */
|
||||
Name(UOM0, 0)
|
||||
Name(UOM1, 2)
|
||||
|
@ -763,27 +761,7 @@ DefinitionBlock (
|
|||
|
||||
} /* End Scope(_SB) */
|
||||
|
||||
|
||||
/* Supported sleep states: */
|
||||
Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
|
||||
|
||||
If (LAnd(SSFG, 0x01)) {
|
||||
Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
|
||||
}
|
||||
If (LAnd(SSFG, 0x02)) {
|
||||
Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x04)) {
|
||||
Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
|
||||
}
|
||||
If (LAnd(SSFG, 0x08)) {
|
||||
Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
|
||||
}
|
||||
|
||||
Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
|
||||
|
||||
Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
|
||||
Name(CSMS, 0) /* Current System State */
|
||||
#include <southbridge/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Wake status package */
|
||||
Name(WKST,Package(){Zero, Zero})
|
||||
|
|
Loading…
Reference in New Issue