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intel/broadwell: Add option to enable/disable the PCIe AER capability 

The Advanced Error Reporting capability was hardcoded in the PCIe
extended capability list, but it might not always be possible.

The Librem 13v1 does not seem to have working AER and this option
was needed and tested on the Librem 13v1. Without it, the linux
console gets spammed with AER errrors.

Change-Id: If2e0ec42c93f1fee927eacdf0099004cf9302fbe
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Reviewed-on: https://review.coreboot.org/25326
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Youness Alaoui 2018-05-04 15:34:06 -04:00 committed by Martin Roth
parent 1f64b01bbe
commit 7161678407
2 changed files with 10 additions and 2 deletions
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4
src/soc/intel/broadwell/Kconfig
View File

@ -47,6 +47,10 @@ config PCIEXP_ASPM
bool
default y
config PCIEXP_AER
bool
default y
config PCIEXP_COMMON_CLOCK
bool
default y

8
src/soc/intel/broadwell/pcie.c
View File

@ -555,8 +555,12 @@ static void pch_pcie_early(struct device *dev)
pci_update_config8(dev, 0xf5, 0x0f, 0);
/* Set AER Extended Cap ID to 01h and Next Cap Pointer to 200h. */
pci_update_config32(dev, 0x100, ~(1 << 29) & ~0xfffff,
(1 << 29) | 0x10001);
if (IS_ENABLED(CONFIG_PCIEXP_AER))
pci_update_config32(dev, 0x100, ~(1 << 29) & ~0xfffff,
(1 << 29) | 0x10001);
else
pci_update_config32(dev, 0x100, ~(1 << 29) & ~0xfffff,
(1 << 29));
/* Set L1 Sub-State Cap ID to 1Eh and Next Cap Pointer to None. */
if (IS_ENABLED(CONFIG_PCIEXP_L1_SUB_STATE))