drivers/intel/fsp2_0: Move Debug options to "Debugging"
Change-Id: I8e07c8186baf3d8e91b77c5afb731d26a1abfbaf Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36165 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -740,6 +740,9 @@ menu "Debugging"
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comment "CPU Debug Settings"
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comment "CPU Debug Settings"
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source "src/cpu/*/Kconfig.debug_cpu"
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source "src/cpu/*/Kconfig.debug_cpu"
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comment "BLOB Debug Settings"
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source "src/drivers/intel/fsp*/Kconfig.debug_blob"
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comment "General Debug Settings"
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comment "General Debug Settings"
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# TODO: Better help text and detailed instructions.
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# TODO: Better help text and detailed instructions.
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@ -37,32 +37,6 @@ config ADD_FSP_BINARIES
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Add the FSP-M and FSP-S binaries to CBFS. Currently coreboot does not
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Add the FSP-M and FSP-S binaries to CBFS. Currently coreboot does not
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use the FSP-T binary and it is not added.
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use the FSP-T binary and it is not added.
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config DISPLAY_FSP_CALLS_AND_STATUS
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bool "Display the FSP calls and status"
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default n
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help
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Display the FSP call entry point and parameters prior to calling FSP
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and display the status upon return from FSP.
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config DISPLAY_FSP_HEADER
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bool "Display the FSP header"
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default n
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help
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Display the FSP header information when the FSP file is found.
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config DISPLAY_HOBS
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bool "Display the hand-off-blocks"
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default n
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help
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Display the FSP HOBs which are provided for coreboot.
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config DISPLAY_UPD_DATA
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bool "Display UPD data"
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default n
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help
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Display the user specified product data prior to memory
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initialization.
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config CPU_MICROCODE_CBFS_LEN
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config CPU_MICROCODE_CBFS_LEN
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hex "Microcode update region length in bytes"
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hex "Microcode update region length in bytes"
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depends on FSP_CAR
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depends on FSP_CAR
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@ -158,22 +132,10 @@ config FSP_TEMP_RAM_SIZE
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stack with coreboot/bootloader.
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stack with coreboot/bootloader.
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Sync this value with Platform FSP integration guide recommendation.
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Sync this value with Platform FSP integration guide recommendation.
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config VERIFY_HOBS
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bool "Verify the FSP hand-off-blocks"
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default n
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help
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Verify that the HOBs required by coreboot are returned by FSP and
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that the resource HOBs are in the correct order and position.
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config RESET_ON_INVALID_RAMSTAGE_CACHE
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config RESET_ON_INVALID_RAMSTAGE_CACHE
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bool "Reset the system on S3 wake when ramstage cache invalid."
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bool "Reset the system on S3 wake when ramstage cache invalid."
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default n
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default n
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config DISPLAY_FSP_VERSION_INFO
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bool "Display Firmware Ingredient Version Information"
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help
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Select this option to display Firmware version information.
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config FSP2_0_USES_TPM_MRC_HASH
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config FSP2_0_USES_TPM_MRC_HASH
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bool
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bool
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depends on TPM1 || TPM2
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depends on TPM1 || TPM2
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@ -0,0 +1,41 @@
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if PLATFORM_USES_FSP2_0
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config DISPLAY_FSP_CALLS_AND_STATUS
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bool "Display the FSP calls and status"
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default n
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help
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Display the FSP call entry point and parameters prior to calling FSP
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and display the status upon return from FSP.
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config DISPLAY_FSP_HEADER
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bool "Display the FSP header"
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default n
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help
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Display the FSP header information when the FSP file is found.
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config DISPLAY_HOBS
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bool "Display the hand-off-blocks"
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default n
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help
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Display the FSP HOBs which are provided for coreboot.
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config DISPLAY_UPD_DATA
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bool "Display UPD data"
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default n
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help
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Display the user specified product data prior to memory
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initialization.
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config VERIFY_HOBS
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bool "Verify the FSP hand-off-blocks"
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default n
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help
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Verify that the HOBs required by coreboot are returned by FSP and
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that the resource HOBs are in the correct order and position.
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config DISPLAY_FSP_VERSION_INFO
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bool "Display Firmware Ingredient Version Information"
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help
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Select this option to display Firmware version information.
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endif # PLATFORM_USES_FSP2_0
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