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soc/mediatek/mt8192: update descriptions for dram config 

MEMORY_TEST,  MT8192_DRAM_DVFS

Signed-off-by: Xi Chen <xixi.chen@mediatek.com>
Change-Id: I2e714c0ce588e48bbe6bd8e59c03bdb69dea01e6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46616
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Xi Chen 2020-10-21 15:41:06 +08:00 committed by Hung-Te Lin
parent 6871d51125
commit 71e86d66a6
1 changed files with 8 additions and 2 deletions
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10
src/soc/mediatek/mt8192/Kconfig
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@ -33,10 +33,16 @@ config MT8192_DRAM_DVFS
bool
default n
help
This options enables DRAM calibration with multiple frequencies (low,
medium and high) for DVFS feature.
This option enables DRAM calibration with multiple frequencies (low,
medium and high frequency groups, with total 7 frequencies) for DVFS
feature. All supported data rates are: 800, 1200, 1600, 1866, 2400,
3200, 4266.
config MEMORY_TEST
bool
default y
help
This option enables memory basic compare test to verify the DRAM read
or write is as expected.
endif