mb/google/zork: Adjust Dirinboz H1 I2C CLK

Adjust H1 I2C CLK:
404kHz -> 391 kHz

BUG=b:178656936
BRANCH=master
TEST=1. emerge-zork coreboot chromeos-bootimage
     2. power on proto board successfully
     3. measure i2c freq by scope is close to 400kHz

Change-Id: I9067db9fc7a4d6aa2ce33b86ba6a611dfd5d7838
Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50284
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
This commit is contained in:
Kevin Chiu 2021-02-04 20:09:51 +08:00 committed by Patrick Georgi
parent 26b0bad671
commit 72463720a2
1 changed files with 2 additions and 2 deletions

View File

@ -70,8 +70,8 @@ chip soc/amd/picasso
# I2C3 for H1
register "i2c[3]" = "{
.speed = I2C_SPEED_FAST,
.rise_time_ns = 184, /* 0 to 1.26v (1.8 * .7) */
.fall_time_ns = 42, /* 1.26v to 0 */
.rise_time_ns = 98, /* 0 to 1.26v (1.8 * .7) */
.fall_time_ns = 17, /* 1.26v to 0 */
.early_init = true,
}"