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soc/amd/common: Change default spi speeds to 33MHz

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In CB:56884 we discussed changing the default fast_read speed from
66MHz, which some platforms may not be capable of running, to 33MHz,
which should be generally suitable for all platforms.  This same
change has been applied to the default for all SPI speeds.

Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: Ibf926df6829ffdcbae947aaa245356f219615ce8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57148
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Martin Roth 2021-08-25 10:15:10 -06:00 committed by Felix Held
parent ff236ef832
commit 7266c5ec84
1 changed files with 3 additions and 3 deletions
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6
src/soc/amd/common/block/spi/Kconfig
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@ -37,7 +37,7 @@ config EFS_SPI_SPEED
int
range 0 5
default 3 if EM100
default 0
default 1
help
SPI Fast Speed to be programmed by the PSP.
0: 66.66Mhz
@ -77,7 +77,7 @@ config ALT_SPI_SPEED
int
range 0 5
default 3 if EM100
default 0
default 1
help
SPI ALT Speed to be programmed by coreboot.
0: 66.66Mhz
@ -91,7 +91,7 @@ config TPM_SPI_SPEED
int
range 0 5
default 3 if EM100
default 0
default 1
help
SPI TPM Speed to be programmed by coreboot.
0: 66.66Mhz